per\-peripheral (full) in projects: linux

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/linux/Documentation/driver-api/soundwire/
H A D	bra.rst	6 ----------- 12 ------------ 14 The SoundWire 1.x specification provides a mechanism to speed-up 20 one byte per frame with write/read commands. With a typical 48kHz 28 10-byte overhead per frame (header and footer response). 35 (3) The targeted Peripheral device SHALL support the optional Data 36 Port 0, and likewise the Manager SHALL expose audio-like Ports 41 bandwidth. If there are no on-going audio transfers, the entire 48 (5) The number of bits transferred per frame SHALL be a multiple of 61 need to be spaced in time or flow-controlled. [all …]
/linux/Documentation/devicetree/bindings/serial/
H A D	fsl-imx-uart.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Fabio Estevam <festevam@gmail.com> 15 - const: fsl,imx1-uart 16 - const: fsl,imx21-uart 17 - items: 18 - enum: 19 - fsl,imx25-uart [all …]`
/linux/Documentation/devicetree/bindings/spi/
H A D	spi-peripheral-props.yaml	1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Peripheral-specific properties for a SPI bus. 10 Many SPI controllers need to add properties to peripheral devices. They could 11 be common properties like spi-max-frequency, spi-cs-high, etc. or they could 13 properties need to be defined in the peripheral node because they are 14 per-peripheral and there can be multiple peripherals attached to a 20 - Mark Brown <broonie@kernel.org> [all …]
H A D	fsl-imx-cspi.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/fsl-imx-cspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale (Enhanced) Configurable Serial Peripheral Interface (CSPI/eCSPI) for i.MX 10 - Shawn Guo <shawnguo@kernel.org> 13 - $ref: /schemas/spi/spi-controller.yaml# 18 - const: fsl,imx1-cspi 19 - const: fsl,imx21-cspi 20 - const: fsl,imx27-cspi [all …]`
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A D	img,pdc-intc.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/img,pdc-intc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - James Hogan <jhogan@kernel.org> 19 const: img,pdc-intc 24 interrupt-controller: true 26 '#interrupt-cells': 28 <1st-cell>: The interrupt-number that identifies the interrupt source. 29 0-7: Peripheral interrupts [all …]`
H A D	brcm,bcm2836-l1-intc.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2836-l1-intc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: BCM2836 per-CPU interrupt controller 10 - Stefan Wahren <wahrenst@gmx.net> 11 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com> 14 The BCM2836 has a per-cpu interrupt controller for the timer, PMU 16 peripheral (GPU) events, which chain to the BCM2835-style interrupt 20 - $ref: /schemas/interrupt-controller.yaml# [all …]
H A D	brcm,bcm6345-l1-intc.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm6345-l1-intc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom BCM6345-style Level 1 interrupt controller 10 - Simon Arlott <simon@octiron.net> 18 - 32, 64 or 128 incoming level IRQ lines 20 - Most onchip peripherals are wired directly to an L1 input 22 - A separate instance of the register set for each CPU, allowing individual 23 peripheral IRQs to be routed to any CPU [all …]
/linux/Documentation/driver-api/
H A D	sm501.rst	15 ---- 27 peripheral set as platform devices for the specific drivers. 29 The core re-uses the platform device system as the platform device 31 need to create a new bus-type and the associated code to go with it. 35 --------- 37 Each peripheral has a view of the device which is implicitly narrowed to 38 the specific set of resources that peripheral requires in order to 43 as this is by-far the most resource-sensitive of the on-chip functions. 59 ------------- 66 The PCI driver assumes that the PCI card behaves as per the Silicon [all …]
/linux/Documentation/devicetree/bindings/phy/
H A D	nvidia,tegra186-xusb-padctl.yaml	1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
H A D	nvidia,tegra194-xusb-padctl.yaml	1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
H A D	nvidia,tegra124-xusb-padctl.yaml	1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
H A D	nvidia,tegra210-xusb-padctl.yaml	1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
/linux/Documentation/driver-api/usb/
H A D	gadget.rst	11 This document presents a Linux-USB "Gadget" kernel mode API, for use 17 - Supports USB 2.0, for high speed devices which can stream data at 18 several dozen megabytes per second. 20 - Handles devices with dozens of endpoints just as well as ones with 21 just two fixed-function ones. Gadget drivers can be written so 24 - Flexible enough to expose more complex USB device capabilities such 28 - USB "On-The-Go" (OTG) support, in conjunction with updates to the 29 Linux-USB host side. 31 - Sharing data structures and API models with the Linux-USB host side 32 API. This helps the OTG support, and looks forward to more-symmetric [all …]
/linux/sound/soc/codecs/
H A D	cs35l56-sdw.c	1 // SPDX-License-Identifier: GPL-2.0-only 37 static int cs35l56_sdw_poll_mem_status(struct sdw_slave peripheral, in cs35l56_sdw_poll_mem_status() argument 46 false, peripheral, CS35L56_SDW_MEM_ACCESS_STATUS); in cs35l56_sdw_poll_mem_status() 56 static int cs35l56_sdw_slow_read(struct sdw_slave peripheral, unsigned int reg, in cs35l56_sdw_slow_read() argument 65 ret = cs35l56_sdw_poll_mem_status(peripheral, in cs35l56_sdw_slow_read() 69 dev_err(&peripheral->de in cs35l56_sdw_slow_read() 99 cs35l56_sdw_read_one(struct sdw_slave * peripheral,unsigned int reg,void * buf) cs35l56_sdw_read_one() argument 118 struct sdw_slave peripheral = context; cs35l56_sdw_read() local 163 cs35l56_sdw_write_one(struct sdw_slave peripheral,unsigned int reg,const void * buf) cs35l56_sdw_write_one() argument 181 struct sdw_slave peripheral = context; cs35l56_sdw_gather_write() local 254 cs35l56_sdw_init(struct sdw_slave peripheral) cs35l56_sdw_init() argument 289 cs35l56_sdw_interrupt(struct sdw_slave * peripheral,struct sdw_slave_intr_status * status) cs35l56_sdw_interrupt() argument 338 cs35l56_sdw_read_prop(struct sdw_slave * peripheral) cs35l56_sdw_read_prop() argument 369 cs35l56_sdw_update_status(struct sdw_slave * peripheral,enum sdw_slave_status status) cs35l56_sdw_update_status() argument 396 cs35l56_sdw_clk_stop(struct sdw_slave * peripheral,enum sdw_clk_stop_mode mode,enum sdw_clk_stop_type type) cs35l56_sdw_clk_stop() argument 418 struct sdw_slave peripheral = cs35l56->sdw_peripheral; cs35l56_sdw_handle_unattach() local 508 cs35l56_sdw_probe(struct sdw_slave peripheral,const struct sdw_device_id * id) cs35l56_sdw_probe() argument 557 cs35l56_sdw_remove(struct sdw_slave * peripheral) cs35l56_sdw_remove() argument [all...]
/linux/Documentation/devicetree/bindings/dma/stm32/
H A D	st,stm32-dma.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 The STM32 DMA is a general-purpose direct memory access controller capable of 13 described in the dma.txt file, using a four-cell specifier for each 19 -bit 9: Peripheral Increment Address 22 -bit 10: Memory Increment Address 25 -bit 15: Peripheral Increment Offset Size 26 0x0: offset size is linked to the peripheral bus width [all …]
/linux/Documentation/devicetree/bindings/dma/
H A D	img-mdc-dma.txt	1 * IMG Multi-threaded DMA Controller (MDC) 4 - compatible: Must be "img,pistachio-mdc-dma". 5 - reg: Must contain the base address and length of the MDC registers. 6 - interrupts: Must contain all the per-channel DMA interrupts. 7 - clocks: Must contain an entry for each entry in clock-names. 8 See ../clock/clock-bindings.txt for details. 9 - clock-names: Must include the following entries: 10 - sys: MDC system interface clock. 11 - img,cr-periph: Must contain a phandle to the peripheral control syscon 13 - img,max-burst-multiplier: Must be the maximum supported burst size multiplier. [all …]
/linux/Documentation/driver-api/dmaengine/
H A D	client.rst	8 ``Documentation/crypto/async-tx-api.rst`` 11 Below is a guide to device driver writers on how to use the Slave-DMA API of the 19 - Allocate a DMA slave channel 21 - Set slave and controller specific parameters 23 - Get a descriptor for transaction 25 - Submit the transaction 27 - Issue pending requests and wait for callback notification 40 .. code-block:: c 57 for the peripheral. 66 .. code-block:: c [all …]
/linux/drivers/bus/
H A D	stm32_rifsc.c	1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2023, STMicroelectronics - All Rights Reserved 81 void __iomem addr = stm32_firewall_controller->mmio + RIFSC_RISC_PER0_SEMCR + 0x8 id; in stm32_rif_acquire_semaphore() 88 return -EACCES; in stm32_rif_acquire_semaphore() 96 void __iomem addr = stm32_firewall_controller->mmio + RIFSC_RISC_PER0_SEMCR + 0x8 id; in stm32_rif_release_semaphore() 114 if (firewall_id >= rifsc_controller->max_entries) { in stm32_rifsc_grant_access() 115 dev_err(rifsc_controller->dev, "Invalid sys bus ID %u", firewall_id); in stm32_rifsc_grant_access() 116 return -EINVAL; in stm32_rifsc_grant_access() 122 * per peripheral in stm32_rifsc_grant_access() 126 sec_reg_value = readl(rifsc_controller->mmio + RIFSC_RISC_SECCFGR0 + 0x4 * reg_id); in stm32_rifsc_grant_access() [all …]
/linux/include/linux/platform_data/
H A D	dma-dw.h	1 /* SPDX-License-Identifier: GPL-2.0 / 6 Copyright (C) 2010-2011 ST Microelectronics 22 * struct dw_dma_slave - Controller-specific information about a slave 28 * @p_master: peripheral master for transfers on allocated channel 43 * struct dw_dma_platform_data - Controller configuration parameters 49 * @data_width: Maximum data width supported by hardware per AHB master 51 * @multi_block: Multi block transfers supported by hardware per channel. 53 * per channel (in units of CTL.SRC_TR_WIDTH/CTL.DST_TR_WIDTH). 54 * @protctl: Protection control signals setting per channel.
/linux/drivers/dma/dw/
H A D	regs.h	`1 /* SPDX-License-Identifier: GPL-2.0 / 5 Copyright (C) 2005-2007 Atmel Corporation 6 * Copyright (C) 2010-2011 ST Microelectronics 14 #include <linux/io-64-nonatomic-hi-lo.h> 33 * Redefine this macro to handle differences between 32- and 64-bit 64 /* per-channel registers / 89 / iDMA 32-bit support / 96 / per-channel configuration registers / 101 / top-level parameters / 108 / iDMA 32-bit support */ [all …]`
/linux/Documentation/devicetree/bindings/leds/backlight/
H A D	qcom-wled.yaml	`1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/leds/backlight/qcom-wled.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Kiran Gunda <quic_kgunda@quicinc.com> 21 - qcom,pm8941-wled 22 - qcom,pmi8950-wled 23 - qcom,pmi8994-wled 24 - qcom,pmi8998-wled [all …]`
/linux/Documentation/devicetree/bindings/timer/
H A D	econet,en751221-timer.yaml	1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/econet,en751221-timer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Caleb James DeLisle <cjd@cjdns.fr> 13 The EcoNet High Precision Timer (HPT) is a timer peripheral found in various 14 EcoNet SoCs, including the EN751221 and EN751627 families. It provides per-VPE 15 count/compare registers and a per-CPU control register, with a single interrupt 16 line using a percpu-devid interrupt mechanism. 21 - const: econet,en751221-timer [all …]
/linux/Documentation/devicetree/bindings/sound/
H A D	renesas,idt821034.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Herve Codina <herve.codina@bootlin.com> 16 The time-slots used by the codec must be set and so, the properties 17 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and 18 'dai-tdm-slot-rx-mask' must be present in the ALSA sound card node for 19 sub-nodes that involve the codec. The codec uses one 8bit time-slot per 21 'dai-tdm-tdm-slot-with' must be set to 8. 23 The IDT821034 codec also supports 5 gpios (SLIC signals) per channel. [all …]
/linux/drivers/hid/intel-ish-hid/ipc/
H A D	hw-ish-regs.h	`1 /* SPDX-License-Identifier: GPL-2.0-only / 5 Copyright (c) 2012-2016, Intel Corporation. 15 /* Peripheral Interrupt Status Register / 17 / Peripheral Interrupt Mask Register / 20 /Peripheral Interrupt Status Register / 22 /Peripheral Interrupt Mask Register / 45 / register bits - HISR / 130 #define IPC_RMP2_DMA_ENABLED 0x1 / Value to enable DMA, per D3 RCR / 188 / todo - temp until PIMR HW ready */`
/linux/include/linux/soundwire/
H A D	sdw_amd.h	1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) / 3 Copyright (C) 2023-24 Advanced Micro Devices, Inc. All rights reserved. 22 * is invoked. If set, a complete bus reset and re-enumeration will 23 * be performed when the bus restarts. In-band wake interrupts are 58 * struct amd_sdw_manager - amd manager driver context 64 * @amd_sdw_work: peripheral status work queue 66 * @status: peripheral devices status array 73 * @wake_en_mask: wake enable mask per SoundWire manager 110 * struct sdw_amd_acpi_info - Soundwire AMD information found in ACPI tables 113 * @link_mask: bit-wise mask listing links enabled by BIOS menu [all …]

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