Searched +full:per +full:- +full:vpe (Results 1 – 3 of 3) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/timer/ |
| H A D | econet,en751221-timer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/econet,en751221-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Caleb James DeLisle <cjd@cjdns.fr>
14 EcoNet SoCs, including the EN751221 and EN751627 families. It provides per-VPE
15 count/compare registers and a per-CPU control register, with a single interrupt
16 line using a percpu-devid interrupt mechanism.
21 - const: econet,en751221-timer
22 - items:
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| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | econet,en751221-intc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/econet,en751221-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Caleb James DeLisle <cjd@cjdns.fr>
15 be routed to either VPE but not both, so to support per-CPU interrupts, a
16 secondary IRQ number is allocated to control masking/unmasking on VPE#1. For
22 - $ref: /schemas/interrupt-controller.yaml#
26 const: econet,en751221-intc
31 "#interrupt-cells":
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| /freebsd/sys/arm64/arm64/ |
| H A D | gicv3_its.c | 1 /*-
2 * Copyright (c) 2015-2016 The FreeBSD Foundation
98 #define LPI_CONFTAB_MAX_ADDR ((1ul << 48) - 1) /* We need a 47 bit PA */
100 /* 1 bit per SPI, PPI, and SGI (8k), and 1 bit per LPI (LPI_CONFTAB_SIZE) */
103 #define LPI_PENDTAB_MAX_ADDR ((1ul << 48) - 1) /* We need a 47 bit PA */
106 #define LPI_INT_TRANS_TAB_MAX_ADDR ((1ul << 48) - 1)
131 /* Target (CPU or Re-Distributor) */
238 uint64_t col_target; /* Target Re-Distributor */
262 struct its_col *sc_its_cols[MAXCPU]; /* Per-CPU collections */
315 bus_read_4((sc)->sc_its_res, (reg))
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