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/linux/drivers/pmdomain/mediatek/
H A Dmtk-pm-domains.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/arm-smccc.h>
7 #include <linux/clk-provider.h>
21 #include "mt6735-pm-domains.h"
22 #include "mt6795-pm-domains.h"
23 #include "mt6893-pm-domains.h"
24 #include "mt8167-pm-domains.h"
25 #include "mt8173-pm-domains.h"
26 #include "mt8183-pm-domains.h"
27 #include "mt8186-pm-domains.h"
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8dxl-ss-adma.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 /delete-node/ &asrc1;
7 /delete-node/ &asrc1_lpcg;
8 /delete-node/ &adc1;
9 /delete-node/ &adc1_lpcg;
10 /delete-node/ &amix;
11 /delete-node/ &amix_lpcg;
12 /delete-node/ &edma1;
13 /delete-node/ &esai0;
14 /delete-node/ &esai0_lpcg;
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H A Dimx8qm-ss-audio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 /delete-node/ &acm;
8 /delete-node/ &sai4;
9 /delete-node/ &sai5;
10 /delete-node/ &sai4_lpcg;
11 /delete-node/ &sai5_lpcg;
37 power-domains = <&pd IMX_SC_R_ASRC_0>;
43 clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_2>;
44 clock-output-names = "asrc0_lpcg_ipg_clk", "asrc0_lpcg_mem_clk";
67 power-domains = <&pd IMX_SC_R_ASRC_1>;
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H A Dimx8qm-ss-dma.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 /delete-node/ &adma_pwm;
8 /delete-node/ &adma_pwm_lpcg;
11 uart4_lpcg: clock-controller@5a4a0000 {
12 compatible = "fsl,imx8qxp-lpcg";
14 #clock-cells = <1>;
17 clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
18 clock-output-names = "uart4_lpcg_baud_clk",
20 power-domains = <&pd IMX_SC_R_UART_4>;
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H A Dimx8dxl-ss-conn.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 /delete-node/ &enet1_lpcg;
7 /delete-node/ &fec2;
8 /delete-node/ &usbotg3;
9 /delete-node/ &usb3_phy;
10 /delete-node/ &usb3_lpcg;
13 conn_enet0_root_clk: clock-conn-enet0-root {
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <250000000>;
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/linux/drivers/pmdomain/xilinx/
H A Dzynqmp-pm-domains.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2019 Xilinx, Inc.
20 #include <linux/firmware/xlnx-zynqmp.h>
27 * struct zynqmp_pm_domain - Wrapper around struct generic_pm_domain
29 * @node_id: PM node ID corresponding to device inside PM domain
30 * @requested: The PM node mapped to the PM domain has been requested
42 * zynqmp_gpd_is_active_wakeup_path() - Check if device is in wakeup source
65 * zynqmp_gpd_power_on() - Power on PM domain
75 struct zynqmp_pm_domain *pd = to_zynqmp_pm_domain(domain); in zynqmp_gpd_power_on() local
78 ret = zynqmp_pm_set_requirement(pd->node_id, in zynqmp_gpd_power_on()
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/linux/drivers/cpuidle/
H A Dcpuidle-psci-domain.c1 // SPDX-License-Identifier: GPL-2.0
3 * PM domains for CPUs via genpd - managed by cpuidle-psci.
22 #include "cpuidle-psci.h"
27 struct device_node *node; member
32 static int psci_pd_power_off(struct generic_pm_domain *pd) in psci_pd_power_off() argument
34 struct genpd_power_state *state = &pd->states[pd->state_idx]; in psci_pd_power_off()
37 if (!state->data) in psci_pd_power_off()
41 pd_state = state->data; in psci_pd_power_off()
42 psci_set_domain_state(pd, pd->state_idx, *pd_state); in psci_pd_power_off()
49 struct generic_pm_domain *pd; in psci_pd_init() local
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H A Ddt_idle_genpd.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #define pr_fmt(fmt) "dt-idle-genpd: " fmt
38 ret = -ENOMEM; in pd_parse_state_nodes()
48 i--; in pd_parse_state_nodes()
49 for (; i >= 0; i--) in pd_parse_state_nodes()
84 void dt_idle_pd_free(struct generic_pm_domain *pd) in dt_idle_pd_free() argument
86 pd_free_states(pd->states, pd->state_count); in dt_idle_pd_free()
87 kfree(pd->name); in dt_idle_pd_free()
88 kfree(pd); in dt_idle_pd_free()
94 struct generic_pm_domain *pd; in dt_idle_pd_alloc() local
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H A Dcpuidle-riscv-sbi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * RISC-V SBI CPU idle driver.
9 #define pr_fmt(fmt) "cpuidle-riscv-sbi: " fmt
53 data->available = true; in sbi_set_domain_state()
54 data->state = state; in sbi_set_domain_state()
61 return data->state; in sbi_get_domain_state()
68 data->available = false; in sbi_clear_domain_state()
75 return data->available; in sbi_is_domain_state_available()
96 u32 *states = data->states; in __sbi_enter_domain_idle_state()
97 struct device *pd_dev = data->dev; in __sbi_enter_domain_idle_state()
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/linux/drivers/gpu/drm/lima/
H A Dlima_vm.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
5 #include <linux/dma-mapping.h>
16 struct drm_mm_node node; member
26 #define LIMA_VM_PT_MASK ((1 << LIMA_VM_PD_SHIFT) - 1)
27 #define LIMA_VM_BT_MASK ((1 << LIMA_VM_PB_SHIFT) - 1)
43 vm->bts[pbe].cpu[bte] = 0; in lima_vm_unmap_range()
52 if (!vm->bts[pbe].cpu) { in lima_vm_map_page()
54 u32 *pd; in lima_vm_map_page() local
57 vm->bts[pbe].cpu = dma_alloc_wc( in lima_vm_map_page()
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/linux/drivers/pmdomain/rockchip/
H A Dpm-domains.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/arm-smccc.h>
26 #include <dt-bindings/power/px30-power.h>
27 #include <dt-bindings/power/rockchip,rv1126-power.h>
28 #include <dt-bindings/power/rockchip,rv1126b-power-controller.h>
29 #include <dt-bindings/power/rk3036-power.h>
30 #include <dt-bindings/power/rk3066-power.h>
31 #include <dt-bindings/power/rk3128-power.h>
32 #include <dt-bindings/power/rk3188-power.h>
33 #include <dt-bindings/power/rk3228-power.h>
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/linux/drivers/pmdomain/samsung/
H A Dexynos-pm-domains.c1 // SPDX-License-Identifier: GPL-2.0
9 // conjunction with runtime-pm. Support for both device-tree and non-device-tree
32 struct generic_pm_domain pd; member
38 struct exynos_pm_domain *pd; in exynos_pd_power() local
43 pd = container_of(domain, struct exynos_pm_domain, pd); in exynos_pd_power()
44 base = pd->base; in exynos_pd_power()
46 pwr = power_on ? pd->local_pwr_cfg : 0; in exynos_pd_power()
52 while ((readl_relaxed(base + 0x4) & pd->local_pwr_cfg) != pwr) { in exynos_pd_power()
55 pr_err("Power domain %s %s failed\n", domain->name, op); in exynos_pd_power()
56 return -ETIMEDOUT; in exynos_pd_power()
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/linux/Documentation/devicetree/bindings/power/
H A Dfsl,scu-pd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,scu-pd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX SCU Client Device Node - Power Domain Based on SCU Message Protocol
10 - Dong Aisheng <aisheng.dong@nxp.com>
12 description: i.MX SCU Client Device Node
13 Client nodes are maintained as children of the relevant IMX-SCU device node.
17 - $ref: power-domain.yaml#
22 - enum:
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/linux/arch/arm/mach-rockchip/
H A Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
38 static int pmu_power_domain_is_on(int pd) in pmu_power_domain_is_on() argument
47 return !(val & BIT(pd)); in pmu_power_domain_is_on()
57 np = dev->of_node; in rockchip_get_core_reset()
64 static int pmu_set_power_domain(int pd, bool on) in pmu_set_power_domain() argument
66 u32 val = (on) ? 0 : BIT(pd); in pmu_set_power_domain()
67 struct reset_control *rstc = rockchip_get_core_reset(pd); in pmu_set_power_domain()
72 __func__, pd); in pmu_set_power_domain()
85 ret = regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), val); in pmu_set_power_domain()
92 ret = -1; in pmu_set_power_domain()
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/linux/drivers/clk/davinci/
H A Dpsc.c1 // SPDX-License-Identifier: GPL-2.0
9 * Murali Karicheri <m-karicheri2@ti.com>
12 * And: arch/arm/mach-davinci/psc.c
16 #include <linux/clk-provider.h>
27 #include <linux/reset-controller.h>
65 * struct davinci_lpsc_clk - LPSC clock structure
72 * @pd: Power domain
82 u32 pd; member
90 * best_dev_name - get the "best" device name.
93 * Returns the device tree compatible name if the device has a DT node,
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/linux/kernel/power/
H A Denergy_model.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2018-2021, Arm ltd.
46 return (dev->bus == &cpu_subsys); in _is_cpu_device()
53 struct em_perf_domain *pd; member
60 struct em_dbg_info *em_dbg = s->private; \
65 table = em_perf_state_from_pd(em_dbg->pd); \
66 val = table[em_dbg->ps_id].name; \
82 struct dentry *pd) in em_debug_create_ps() argument
89 em_dbg[i].pd = em_pd; in em_debug_create_ps()
99 /* Create per-ps directory */ in em_debug_create_ps()
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/linux/Documentation/devicetree/bindings/connector/
H A Dusb-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 A USB connector node represents a physical USB connector. It should be a child
14 of a USB interface controller or a separate node when it is attached to both
20 - enum:
21 - usb-a-connector
22 - usb-b-connector
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/linux/Documentation/devicetree/bindings/sound/
H A Dmediatek,mt2701-audio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mediatek,mt2701-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The AFE PCM node must be a subnode of the MediaTek audsys device tree node.
13 - Eugen Hristev <eugen.hristev@collabora.com>
18 - mediatek,mt2701-audio
19 - mediatek,mt7622-audio
23 - description: AFE interrupt
24 - description: ASYS interrupt
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/linux/drivers/memory/
H A Demif.c1 // SPDX-License-Identifier: GPL-2.0-only
33 * struct emif_data - Per device static data for driver's use
38 * to this EMIF - read from MR4 register. If there
43 * @node: node in the device list
44 * @base: base address of memory-mapped IO registers.
48 * frequencies, to avoid re-calculating them on
55 * @np_ddr: Pointer to ddr device tree node
61 struct list_head node; member
78 u32 type = emif->plat_data->device_info->type; in do_emif_regdump_show()
79 u32 ip_rev = emif->plat_data->ip_rev; in do_emif_regdump_show()
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vm_pt.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
32 * amdgpu_vm_pt_cursor - state for for_each_amdgpu_vm_pt
42 * amdgpu_vm_pt_level_shift - return the addr shift for each level
58 return 9 * (AMDGPU_VM_PDB0 - level) + in amdgpu_vm_pt_level_shift()
59 adev->vm_manager.block_size; in amdgpu_vm_pt_level_shift()
68 * amdgpu_vm_pt_num_entries - return the number of entries in a PD/PT
81 shift = amdgpu_vm_pt_level_shift(adev, adev->vm_manager.root_level); in amdgpu_vm_pt_num_entries()
82 if (level == adev->vm_manager.root_level) in amdgpu_vm_pt_num_entries()
84 return round_up(adev->vm_manager.max_pfn, 1ULL << shift) in amdgpu_vm_pt_num_entries()
95 * amdgpu_vm_pt_entries_mask - the mask to get the entry number of a PD/PT
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/linux/arch/arm/mach-omap2/
H A Dpowerdomain.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2007-2008, 2010 Texas Instruments, Inc.
6 * Copyright (C) 2007-2011 Nokia Corporation
10 * XXX This should be moved to the mach-omap2/ directory at the earliest
45 * PWRDM_HAS_HDWR_SAR - powerdomain has hardware save-and-restore support
47 * PWRDM_HAS_MPU_QUIRK - MPU pwr domain has MEM bank 0 bits in MEM
50 * PWRDM_HAS_LOWPOWERSTATECHANGE - can transition from a sleep state
58 * Number of memory banks that are power-controllable. On OMAP4430, the
77 * struct powerdomain - OMAP powerdomain
85 * @banks: Number of software-controllable memory banks in this powerdomain
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/linux/drivers/soc/fsl/dpio/
H A Ddpio-service.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright 2014-2016 Freescale Semiconductor Inc.
4 * Copyright 2016-2019 NXP
9 #include <soc/fsl/dpaa2-io.h>
14 #include <linux/dma-mapping.h>
19 #include "qbman-portal.h"
25 struct list_head node; member
47 unsigned int idx; /* position of the next-to-be-returned entry */
67 * If cpu == -1, choose the current cpu, with no guarantees about in service_select_by_cpu()
82 d = service_select_by_cpu(d, -1); in service_select()
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/linux/drivers/media/i2c/
H A Dadp1653.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2008--2011 Nokia Corporation
15 * - fault interrupt handling
16 * - hardware strobe
17 * - power doesn't need to be ON if all lights are off
27 #include <media/v4l2-device.h>
31 #define TIMEOUT_MIN (TIMEOUT_MAX - ADP1653_REG_CONFIG_TMR_SET_MAX \
33 #define TIMEOUT_US_TO_CODE(t) ((TIMEOUT_MAX + (TIMEOUT_STEP / 2) - (t)) \
35 #define TIMEOUT_CODE_TO_US(c) (TIMEOUT_MAX - (c) * TIMEOUT_STEP)
40 struct i2c_client *client = v4l2_get_subdevdata(&flash->subdev); in adp1653_update_hw()
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/linux/block/
H A Dblk-throttle.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "blk-cgroup-rwstat.h"
15 #include "blk-throttle.h"
29 #define rb_entry_tg(node) rb_entry((node), struct throtl_grp, rb_node) argument
49 return pd_to_blkg(&tg->pd); in tg_to_blkg()
53 * sq_to_tg - return the throl_grp the specified service queue belongs to
56 * Return the throtl_grp @sq belongs to. If @sq is the top-level one
61 if (sq && sq->parent_sq) in sq_to_tg()
68 * sq_to_td - return throtl_data the specified service queue belongs to
79 return tg->td; in sq_to_td()
[all …]
/linux/arch/mips/cavium-octeon/
H A Docteon-platform.c6 * Copyright (C) 2004-2017 Cavium, Inc.
19 #include <asm/octeon/cvmx-helper-board.h>
25 #include <asm/octeon/cvmx-uctlx-defs.h>
79 if (dev->of_node) { in octeon2_usb_clocks_start()
83 uctl_node = of_get_parent(dev->of_node); in octeon2_usb_clocks_start()
85 dev_err(dev, "No UCTL device node\n"); in octeon2_usb_clocks_start()
89 "refclk-frequency", &clock_rate); in octeon2_usb_clocks_start()
91 dev_err(dev, "No UCTL \"refclk-frequency\"\n"); in octeon2_usb_clocks_start()
96 "refclk-type", &clock_type); in octeon2_usb_clocks_start()
204 * Step 4: Program the power-on reset field in the UCTL in octeon2_usb_clocks_start()
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