Searched +full:pciea +full:- +full:pcieb +full:- +full:sata (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/phy/fsl,imx8qm-hsio.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Richard Zhu <hongxing.zhu@nxp.com>15 - fsl,imx8qm-hsio16 - fsl,imx8qxp-hsio19 - description: Base address and length of the PHY block20 - description: HSIO control and status registers(CSR) of the PHY21 - description: HSIO CSR of the controller bound to the PHY[all …]
1 // SPDX-License-Identifier: GPL-2.0+8 compatible = "simple-bus";12 #address-cells = <1>;13 #size-cells = <1>;15 pcie0: pciea: pcie@5f000000 {16 compatible = "fsl,imx8q-pcie";19 reg-names = "dbi", "config";22 #interrupt-cells = <1>;24 interrupt-names = "msi";25 #address-cells = <3>;[all …]
1 // SPDX-License-Identifier: GPL-2.0+3 * Copyright 2018-2019 NXP7 /dts-v1/;9 #include <dt-bindings/usb/pd.h>14 compatible = "fsl,imx8qm-mek", "fsl,imx8qm";17 stdout-path = &lpuart0;21 /delete-node/ cpu-map;22 /delete-node/ cpu@100;23 /delete-node/ cpu@101;26 thermal-zones {[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT6 #include <dt-bindings/pwm/pwm.h>10 stdout-path = &lpuart1;15 compatible = "pwm-backlight";16 pinctrl-names = "default";17 pinctrl-0 = <&pinctrl_gpio_bkl_on>;18 brightness-levels = <0 45 63 88 119 158 203 255>;19 default-brightness-level = <4>;20 enable-gpios = <&lsio_gpio1 4 GPIO_ACTIVE_HIGH>; /* Apalis BKL1_ON */21 /* TODO: hook-up to Apalis BKL1_PWM */[all …]