| /freebsd/sys/contrib/device-tree/src/arm64/airoha/ |
| H A D | en7581-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 /dts-v1/; 11 compatible = "airoha,en7581-evb", "airoha,en7581"; 18 stdout-path = "serial0:115200n8"; 19 linux,usable-memory-range = <0x0 0x80200000 0x0 0x1fe00000>; 30 compatible = "fixed-partitions"; 31 #address-cells = <1>; 32 #size-cells = <1>; 37 read-only; 63 read-only; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/marvell/ |
| H A D | armada-388-clearfog.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include "armada-388.dtsi" 9 #include "armada-38x-solidrun-microsom.dtsi" 13 /* So that mvebu u-boot can update the MAC addresses */ 20 stdout-path = "serial0:115200n8"; 23 reg_3p3v: regulator-3p3v { 24 compatible = "regulator-fixed"; 25 regulator-name = "3P3V"; 26 regulator-min-microvolt = <3300000>; 27 regulator-max-microvolt = <3300000>; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | marvell,armada-375-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding 7 - compatible: "marvell,88f6720-pinctrl" 8 - reg: register specifier of MPP registers 10 Available mpp pins/groups and functions: 14 name pins functions 29 mpp13 13 gpio, dev(ready), pcie0(rstout), pcie1(rstout) 35 mpp19 19 gpio, tdm(rst) 43 mpp27 27 gpio, pcie1(clkreq), ge1(rxd3), sd(d1), uart1(cts) 45 mpp29 29 gpio, pcie1(clkreq), ge1(rxclk), sd(d3) 54 mpp38 38 gpio, pcie1(clkreq), ge(mdio) [all …]
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| H A D | marvell,armada-38x-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding 7 - compatible: "marvell,88f6810-pinctrl", "marvell,88f6820-pinctrl" or 8 "marvell,88f6828-pinctrl" depending on the specific variant of the 10 - reg: register specifier of MPP registers 12 Available mpp pins/groups and functions: 16 name pins functions 31 mpp13 13 gpio, ge0(rxd1), pcie0(clkreq), pcie1(clkreq) [1], spi0(cs2), dev(ad15), pci… 34 … gpio, ge0(rxctl), ge(mdio slave), dram(deccerr), spi0(miso), pcie0(clkreq), pcie1(clkreq) [1] 67 …49 gpio, sata2(prsnt) [2], sata3(prsnt) [2], tdm(fsync), audio(lrclk), sd0(d5), pcie1(clkreq) 71 mpp53 53 gpio, sata1(prsnt), sata0(prsnt), tdm(rst), audio(bclk), sd0(d7), ptp(evreq) [all …]
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| H A D | airoha,en7581-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/airoha,en7581-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lorenzo Bianconi <lorenzo@kernel.org> 13 The Airoha's EN7581 Pin controller is used to control SoC pins. 17 const: airoha,en7581-pinctrl 22 gpio-controller: true 24 '#gpio-cells': 27 gpio-ranges: [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3576-evb1-v10.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/pinctrl/rockchip.h> 13 #include <dt-bindings/soc/rockchip,vop2.h> 18 compatible = "rockchip,rk3576-evb1-v10", "rockchip,rk3576"; 26 stdout-path = "serial0:1500000n8"; 29 adc_keys: adc-keys { [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt8395-radxa-nio-12l.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 13 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h> 14 #include <dt-bindings/spmi/spmi.h> 15 #include <dt-bindings/usb/pd.h> 19 chassis-type = "embedded"; 20 compatible = "radxa,nio-12l", "mediatek,mt8395", "mediatek,mt8195"; 36 stdout-path = "serial0:921600n8"; [all …]
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| H A D | mt8395-kontron-3-5-sbc-i1200.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/leds/common.h> 15 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 16 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h> 17 #include <dt-bindings/spmi/spmi.h> 20 model = "Kontron 3.5\"-SBC-i1200"; 21 compatible = "kontron,3-5-sbc-i1200", "mediatek,mt8395", "mediatek,mt8195"; [all …]
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| H A D | mt8395-genio-1200-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 15 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h> 16 #include <dt-bindings/spmi/spmi.h> 17 #include <dt-bindings/usb/pd.h> 20 model = "MediaTek Genio 1200 EVK-P1V2-EMMC"; [all …]
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| H A D | mt8195-cherry.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/spmi/spmi.h> 25 backlight_lcd0: backlight-lcd0 { 26 compatible = "pwm-backlight"; 27 brightness-levels = <0 1023>; 28 default-brightness-level = <576>; 29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>; 30 num-interpolated-steps = <1023>; 32 power-supply = <&ppvar_sys>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8mq-tqma8mq-mba8mx.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2019-2021 TQ-Systems GmbH 6 /dts-v1/; 8 #include "imx8mq-tqma8mq.dtsi" 12 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ on MBa8Mx"; 13 compatible = "tq,imx8mq-tqma8mq-mba8mx", "tq,imx8mq-tqma8mq", "fsl,imx8mq"; 14 chassis-type = "embedded"; 24 extcon_usbotg: extcon-usbotg0 { 25 compatible = "linux,extcon-usb-gpio"; 26 pinctrl-names = "default"; [all …]
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| /freebsd/sys/contrib/device-tree/src/riscv/starfive/ |
| H A D | jh7110-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 9 #include "jh7110-pinfunc.h" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h> 27 stdout-path = "serial0:115200n8"; 33 bootph-pre-ram; 36 gpio-restart { 37 compatible = "gpio-restart"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sdm845-db845c.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11 #include <dt-bindings/sound/qcom,q6afe.h> 12 #include <dt-bindings/sound/qcom,q6asm.h> 14 #include "sdm845-wcd9340.dtsi" 21 qcom,msm-id = <341 0x20001>; 22 qcom,board-id = <8 0>; [all …]
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| H A D | sm8350-hdk.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2020-2021, Linaro Limited 6 /dts-v1/; 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 19 compatible = "qcom,sm8350-hdk", "qcom,sm8350"; 20 chassis-type = "embedded"; 27 stdout-path = "serial0:115200n8"; 30 hdmi-connector { 31 compatible = "hdmi-connector"; 36 remote-endpoint = <<9611_out>; [all …]
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| H A D | sc7280-herobrine.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 16 #include <dt-bindings/input/gpio-keys.h> 17 #include <dt-bindings/input/input.h> 18 #include <dt-bindings/leds/common.h> 20 #include "sc7280-qcard.dtsi" 21 #include "sc7280-chrome-common.dtsi" 25 stdout-path = "serial0:115200n8"; 38 ppvar_sys: ppvar-sys-regulator { 39 compatible = "regulator-fixed"; 40 regulator-name = "ppvar_sys"; [all …]
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| H A D | qcs6490-rb3gen2.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. 6 /dts-v1/; 12 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 13 #include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h> 14 #include <dt-bindings/leds/common.h> 15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 16 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 23 /delete-node/ &ipa_fw_mem; 24 /delete-node/ &rmtfs_mem; [all …]
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| H A D | msm8996.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 8 #include <dt-bindings/clock/qcom,gcc-msm8996.h> 9 #include <dt-bindings/clock/qcom,mmcc-msm8996.h> 10 #include <dt-bindings/clock/qcom,rpmcc.h> 11 #include <dt-bindings/interconnect/qcom,msm8996.h> 12 #include <dt-bindings/interconnect/qcom,msm8996-cbf.h> 13 #include <dt-bindings/firmware/qcom,scm.h> [all …]
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| H A D | sm8450-hdk.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 9 #include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h> 10 #include <dt-bindings/iio/qcom,spmi-adc7-pm8350b.h> 11 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 12 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h> 13 #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> 24 compatible = "qcom,sm8450-hdk", "qcom,sm8450"; 25 chassis-type = "embedded"; [all …]
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| H A D | sm8550-hdk.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 22 compatible = "qcom,sm8550-hdk", "qcom,sm8550"; 23 chassis-type = "embedded"; 30 wcd938x: audio-codec { 31 compatible = "qcom,wcd9385-codec"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&wcd_default>; [all …]
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| H A D | sm8650-hdk.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 21 compatible = "qcom,sm8650-hdk", "qcom,sm8650"; 22 chassis-type = "embedded"; 30 stdout-path = "serial0:115200n8"; 33 hdmi-out { 34 compatible = "hdmi-connector"; 39 remote-endpoint = <<9611_out>; [all …]
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| H A D | qrb5165-rb5.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 10 #include <dt-bindings/sound/qcom,q6afe.h> 11 #include <dt-bindings/sound/qcom,q6asm.h> 12 #include <dt-bindings/usb/pd.h> 20 compatible = "qcom,qrb5165-rb5", "qcom,sm8250"; 21 qcom,msm-id = <455 0x20001>; 22 qcom,board-id = <11 3>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-j721e-beagleboneai64.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * https://beagleboard.org/ai-64 4 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 5 * Copyright (C) 2022-2024 Jason Kridner, BeagleBoard.org Foundation 6 * Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation 9 /dts-v1/; 11 #include "k3-j721e.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/leds/common.h> [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/exynos/google/ |
| H A D | gs101-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * GS101 SoC pin-mux and pin-config device tree source 5 * Copyright 2019-2023 Google LLC 6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org> 9 #include "gs101-pinctrl.h" 12 gpa0: gpa0-gpio-bank { 13 gpio-controller; 14 #gpio-cells = <2>; 15 interrupt-controller; 16 #interrupt-cells = <2>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
| H A D | exynos2200-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 3 * Samsung's Exynos 2200 SoC pin-mux and pin-config device tree source 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "exynos-pinctrl.h" 12 gpa0: gpa0-gpio-bank { 13 gpio-controller; 14 #gpio-cells = <2>; 16 interrupt-controller; 17 #interrupt-cells = <2>; 18 interrupt-parent = <&gic>; [all …]
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| H A D | exynos990-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 3 * Samsung Exynos 990 pin-mux and pin-config device tree source 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "exynos-pinctrl.h" 12 gpa0: gpa0-gpio-bank { 13 gpio-controller; 14 #gpio-cells = <2>; 16 interrupt-controller; 17 #interrupt-cells = <2>; 18 interrupt-parent = <&gic>; [all …]
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