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Searched +full:pcie +full:- +full:sa8775p (Results 1 – 6 of 6) sorted by relevance

/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sa8775p.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sa8775p.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SA8775p PCI Express Root Complex
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
14 Qualcomm SA8775p SoC PCIe root complex controller is based on the Synopsys
15 DesignWare PCIe IP.
19 const: qcom,pcie-sa8775p
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H A Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PCIe Endpoint Controller
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - enum:
16 - qcom,sa8775p-pcie-ep
17 - qcom,sdx55-pcie-ep
18 - qcom,sm8450-pcie-ep
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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sa8775p-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sa8775p-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on sa8775p
10 - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
14 power domains on sa8775p.
16 See also:: include/dt-bindings/clock/qcom,sa8775p-gcc.h
20 const: qcom,sa8775p-gcc
24 - description: XO reference clock
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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sa8775p-rpmh.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sa8775p-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SA8775P
10 - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
16 See also:: include/dt-bindings/interconnect/qcom,sa8775p.h
21 - qcom,sa8775p-aggre1-noc
22 - qcom,sa8775p-aggre2-noc
23 - qcom,sa8775p-clk-virt
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/linux/arch/arm64/boot/dts/qcom/
H A Dsa8775p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/interconnect/qcom,icc.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
11 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
12 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
15 #include <dt-bindings/mailbox/qcom-ipcc.h>
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/linux/drivers/pci/
H A Dquirks.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains work-arounds for many known PCI hardware bugs.
5 * should be handled in arch-specific code.
22 #include <linux/isa-dma.h> /* isa_dma_bridge_buggy */
52 * Retrain the link of a downstream PCIe port by hand if necessary.
57 * 2 x PCIe x1 device, P/N 41433, plugged into the SiFive HiFive Unmatched
106 int ret = -ENOTTY; in pcie_failed_link_retrain()
109 !pcie_cap_has_lnkctl2(dev) || !dev->link_active_reporting) in pcie_failed_link_retrain()
117 pci_info(dev, "broken device, retraining non-functional downstream link at 2.5GT/s\n"); in pcie_failed_link_retrain()
175 if ((f->class == (u32) (dev->class >> f->class_shift) || in pci_do_fixups()
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