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/linux/drivers/pci/controller/
H A Dpcie-iproc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014 Hauke Mehrtens <hauke@hauke-m.de>
9 #include <linux/pci-ecam.h>
17 #include <linux/irqchip/arm-gic-v3.h>
24 #include "pcie-iproc.h"
91 * struct iproc_pcie_ob_map - iProc PCIe outbound mapping controller-specific
138 * enum iproc_pcie_ib_map_type - iProc PCIe inbound mapping type
150 * struct iproc_pcie_ib_map - iProc PCIe inbound mapping controller-specific
159 * @imap_addr_offset: register offset between the upper and lower 32-bit
161 * @imap_window_offset: register offset between each IMAP window
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H A Dpcie-iproc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2014-2015 Broadcom Corporation
10 * enum iproc_pcie_type - iProc PCIe interface type
11 * @IPROC_PCIE_PAXB_BCMA: BCMA-based host controllers
12 * @IPROC_PCIE_PAXB: PAXB-based host controllers for
14 * @IPROC_PCIE_PAXB_V2: PAXB-based host controllers for Stingray SoCs
15 * @IPROC_PCIE_PAXC: PAXC-based host controllers
16 * @IPROC_PCIE_PAXC_V2: PAXC-based host controllers (second generation)
33 * struct iproc_pcie_ob - iProc PCIe outbound mapping
34 * @axi_offset: offset from the AXI address to the internal address used by
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/linux/arch/arm64/boot/dts/broadcom/northstar2/
H A Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
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/linux/Documentation/devicetree/bindings/pci/
H A Dti-pci.txt3 PCIe DesignWare Controller
4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
5 Should be "ti,dra7-pcie-ep" for EP (deprecated)
6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode
9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode
10 - phys : list of PHY specifiers (used by generic PHY framework)
11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
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/linux/arch/arm/boot/dts/axis/
H A Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
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