Searched +full:pbus +full:- +full:csr (Results 1 – 8 of 8) sorted by relevance
| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | mediatek-pcie-gen3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/mediatek-pcie-gen3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jianjun Wang <jianjun.wang@mediatek.com> 19 +-----+ 21 +-----+ 24 port->irq 26 +-+-+-+-+-+-+-+-+ 28 +-+-+-+-+-+-+-+-+ [all …]
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| /linux/arch/alpha/kernel/ |
| H A D | core_tsunami.c | 1 // SPDX-License-Identifier: GPL-2.0 39 * NOTE: Herein lie back-to-back mb instructions. They are magic. 45 * BIOS32-style PCI interface: 66 * Note also that type 1 is determined by non-zero bus number. 72 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 74 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 83 * The function number selects which function of a multi-function device 92 mk_conf_addr(struct pci_bus *pbus, unsigned int device_fn, int where, in mk_conf_addr() argument 95 struct pci_controller *hose = pbus->sysdata; in mk_conf_addr() 97 u8 bus = pbus->number; in mk_conf_addr() [all …]
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| H A D | core_wildfire.c | 1 // SPDX-License-Identifier: GPL-2.0 69 hose->io_space = alloc_resource(); in wildfire_init_hose() 70 hose->mem_space = alloc_resource(); in wildfire_init_hose() 73 hose->sparse_mem_base = 0; in wildfire_init_hose() 74 hose->sparse_io_base = 0; in wildfire_init_hose() 75 hose->dense_mem_base = WILDFIRE_MEM(qbbno, hoseno); in wildfire_init_hose() 76 hose->dense_io_base = WILDFIRE_IO(qbbno, hoseno); in wildfire_init_hose() 78 hose->config_space_base = WILDFIRE_CONF(qbbno, hoseno); in wildfire_init_hose() 79 hose->index = (qbbno << 3) + hoseno; in wildfire_init_hose() 81 hose->io_space->start = WILDFIRE_IO(qbbno, hoseno) - WILDFIRE_IO_BIAS; in wildfire_init_hose() [all …]
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| H A D | core_titan.c | 1 // SPDX-License-Identifier: GPL-2.0 44 * BIOS32-style PCI interface: 89 * Note also that type 1 is determined by non-zero bus number. 95 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 97 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 106 * The function number selects which function of a multi-function device 115 mk_conf_addr(struct pci_bus *pbus, unsigned int device_fn, int where, in mk_conf_addr() argument 118 struct pci_controller *hose = pbus->sysdata; in mk_conf_addr() 120 u8 bus = pbus->number; in mk_conf_addr() 126 if (!pbus->parent) /* No parent means peer PCI bus. */ in mk_conf_addr() [all …]
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| H A D | core_marvel.c | 1 // SPDX-License-Identifier: GPL-2.0 62 q = ev7csr->csr; in read_ev7_csr() 74 ev7csr->csr = q; in write_ev7_csr() 96 return (prev ? prev->next : io7_head); in marvel_next_io7() 104 for (io7 = io7_head; io7 && io7->pe != pe; io7 = io7->next) in marvel_find_io7() 123 io7->pe = pe; in alloc_io7() 124 raw_spin_lock_init(&io7->irq_lock); in alloc_io7() 127 io7->ports[h].io7 = io7; in alloc_io7() 128 io7->ports[h].port = h; in alloc_io7() 129 io7->ports[h].enabled = 0; /* default to disabled */ in alloc_io7() [all …]
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| /linux/arch/arm64/boot/dts/airoha/ |
| H A D | en7581.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 #include <dt-bindings/interrupt-controller/irq.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/en7523-clk.h> 6 #include <dt-bindings/reset/airoha,en7581-reset.h> 9 interrupt-parent = <&gic>; 10 #address-cells = <2>; 11 #size-cells = <2>; 13 reserved-memory { 14 #address-cells = <2>; [all …]
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| /linux/arch/x86/pci/ |
| H A D | fixup.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Exceptions for specific devices. Usually work-arounds for fatal design flaws. 19 * i450NX -- Find and scan all secondary buses on all PXB's. in pci_fixup_i450nx() 24 dev_warn(&d->dev, "Searching for i450NX host bridges\n"); in pci_fixup_i450nx() 30 dev_dbg(&d->dev, "i450NX PXB %d: %02x/%02x/%02x\n", pxb, busno, in pci_fixup_i450nx() 37 pcibios_last_bus = -1; in pci_fixup_i450nx() 44 * i450GX and i450KX -- Find and scan all secondary buses. in pci_fixup_i450gx() 49 dev_info(&d->dev, "i440KX/GX host bridge; secondary bus %02x\n", busno); in pci_fixup_i450gx() 51 pcibios_last_bus = -1; in pci_fixup_i450gx() 63 dev_warn(&d->dev, "Fixing base address flags\n"); in pci_fixup_umc_ide() [all …]
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| /linux/drivers/pci/controller/ |
| H A D | pcie-mediatek-gen3.c | 1 // SPDX-License-Identifier: GPL-2.0 11 #include <linux/clk-provider.h> 15 #include <linux/irqchip/irq-msi-lib.h> 79 #define PCIE_MSI_ENABLE GENMASK(PCIE_MSI_SET_NUM + 8 - 1, 8) 83 GENMASK(PCIE_INTX_SHIFT + PCI_NUM_INTX - 1, PCIE_INTX_SHIFT) 87 #define PCIE_MSI_SET_ENABLE GENMASK(PCIE_MSI_SET_NUM - 1, 0) 124 (((((size) - 1) << 1) & GENMASK(6, 1)) | PCIE_ATR_EN) 152 * struct mtk_gen3_pcie_pdata - differentiate between host generations 169 * struct mtk_msi_set - MSI information for each set 181 * struct mtk_gen3_pcie - PCIe port information [all …]
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