| /linux/Documentation/dev-tools/ |
| H A D | kasan.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 --------
11 designed to find out-of-bounds and use-after-free bugs.
16 2. Software Tag-Based KASAN
17 3. Hardware Tag-Based KASAN
23 Software Tag-Based KASAN or SW_TAGS KASAN, enabled with CONFIG_KASAN_SW_TAGS,
26 using it for testing on memory-restricted devices with real workloads.
28 Hardware Tag-Based KASAN or HW_TAGS KASAN, enabled with CONFIG_KASAN_HW_TAGS,
29 is the mode intended to be used as an in-field memory bug detector or as a
37 The Generic and the Software Tag-Based modes are commonly referred to as the
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| H A D | kfence.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Kernel Electric-Fence (KFENCE)
7 Kernel Electric-Fence (KFENCE) is a low-overhead sampling-based memory safety
8 error detector. KFENCE detects heap out-of-bounds access, use-after-free, and
9 invalid-free errors.
15 non-production test workloads. One way to quickly achieve a large enough total
19 -----
26 ``kfence.sample_interval`` to non-zero value), configure the kernel with::
46 causes CPU wake-ups when the system is completely idle. This may be undesirable
47 on power-constrained systems. The boot parameter ``kfence.deferrable=1``
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| /linux/drivers/net/ethernet/chelsio/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
26 This driver supports Chelsio gigabit and 10-gigabit
34 For customer support, please visit our customer support page at
37 Please send feedback to <linux-bugs@chelsio.com>.
55 This driver supports Chelsio T3-based gigabit and 10Gb Ethernet
61 For customer support, please visit our customer support page at
64 Please send feedback to <linux-bugs@chelsio.com>.
77 This driver supports Chelsio T4, T5 & T6 based gigabit, 10Gb Ethernet
78 adapter and T5/T6 based 40Gb and T6 based 25Gb, 50Gb and 100Gb
84 For customer support, please visit our customer support page at
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| /linux/include/drm/ |
| H A D | drm_vma_manager.h | 84 * drm_vma_offset_exact_lookup_locked() - Look up node by exact address
86 * @start: Start address (page-based, not byte-based)
87 * @pages: Size of object (page-based)
103 return (node && node->vm_node.start == start) ? node : NULL; in drm_vma_offset_exact_lookup_locked()
107 * drm_vma_offset_lock_lookup() - Lock lookup for extended private use
120 * Note: You're in atomic-context while holding this lock!
124 read_lock(&mgr->vm_lock); in drm_vma_offset_lock_lookup()
128 * drm_vma_offset_unlock_lookup() - Unlock lookup for extended private use
131 * Release lookup-lock. See drm_vma_offset_lock_lookup() for more information.
135 read_unlock(&mgr->vm_lock); in drm_vma_offset_unlock_lookup()
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| /linux/Documentation/mm/ |
| H A D | multigen_lru.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Multi-Gen LRU
6 The multi-gen LRU is an alternative LRU implementation that optimizes
7 page reclaim and improves performance under memory pressure. Page
14 ----------
20 * Simple self-correcting heuristics
23 implementations. In the multi-gen LRU, each generation represents a
25 (time-based) common frame of reference and therefore help make better
30 accessed bit. A rmap walk targets a single page and does not try to
31 profit from discovering a young PTE. A page table walk can sweep all
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| /linux/mm/kasan/ |
| H A D | hw_tags.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains core hardware tag-based KASAN code.
88 return -EINVAL; in early_kasan_flag()
95 return -EINVAL; in early_kasan_flag()
105 return -EINVAL; in early_kasan_mode()
114 return -EINVAL; in early_kasan_mode()
124 return -EINVAL; in early_kasan_flag_vmalloc()
134 return -EINVAL; in early_kasan_flag_vmalloc()
144 return -EINVAL; in early_kasan_flag_write_only()
151 return -EINVAL; in early_kasan_flag_write_only()
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| H A D | kasan_test_c.c | 1 // SPDX-License-Identifier: GPL-2.0-only
30 #include <asm/page.h>
40 /* Fields set based on lines observed in the console. */
66 return -1; in kasan_suite_init()
73 * Temporarily enable multi-shot mode. Otherwise, KASAN would only in kasan_suite_init()
97 * KUNIT_EXPECT_KASAN_RESULT - checks whether the executed expression
106 * For hardware tag-based KASAN, when a synchronous tag fault happens, tag
107 * checking is auto-disabled. When this happens, this test handler reenables
152 * KUNIT_EXPECT_KASAN_FAIL - check that the executed expression produces a
162 * KUNIT_EXPECT_KASAN_FAIL_READ - check that the executed expression
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| /linux/Documentation/mm/damon/ |
| H A D | design.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 The monitoring-related information including the monitoring request
14 specification and DAMON-based operation schemes are stored in a data structure
19 To know how user-space can do the configurations and start/stop DAMON, refer to
28 - :ref:`Operations Set <damon_operations_set>`: Implements fundamental
30 address-space and available set of software/hardware primitives,
31 - :ref:`Core <damon_core_logic>`: Implements core logics including monitoring
32 overhead/accuracy control and access-aware system operations on top of the
34 - :ref:`Modules <damon_modules>`: Implements kernel modules for various
49 monitoring are address-space dependent.
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| /linux/Documentation/admin-guide/mm/ |
| H A D | numa_memory_policy.rst | 10 supported platforms with Non-Uniform Memory Access architectures since 2.4.?.
16 (``Documentation/admin-guide/cgroup-v1/cpusets.rst``)
19 programming interface that a NUMA-aware application can take advantage of. When
28 ------------------------
35 that governs all page allocations that aren't controlled by
41 not to overload the initial boot node with boot-time
45 this is an optional, per-task policy. When defined for a
46 specific task, this policy controls all page allocations made
49 all page allocations that would have been controlled by the
61 In a multi-threaded task, task policies apply only to the thread
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| /linux/tools/perf/pmu-events/arch/common/common/ |
| H A D | software.json | 4 "EventName": "cpu-clock",
5 "BriefDescription": "Per-CPU high-resolution timer based event",
10 "EventName": "task-clock",
11 "BriefDescription": "Per-task high-resolution timer based event",
17 "BriefDescription": "Number of page faults [This event is an alias of page-faults]",
22 "EventName": "page-faults",
23 "BriefDescription": "Number of page faults [This event is an alias of faults]",
28 "EventName": "context-switches",
35 "BriefDescription": "Number of context switches [This event is an alias of context-switches]",
40 "EventName": "cpu-migrations",
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| /linux/Documentation/driver-api/ |
| H A D | mtdnand.rst | 10 The generic NAND driver supports almost all NAND and AG-AND based chips
31 --------------------------
37 - [MTD Interface]
43 - [NAND Interface]
48 - [GENERIC]
53 - [DEFAULT]
65 -------------------------------
71 - [INTERN]
77 - [REPLACEABLE]
86 - [BOARDSPECIFIC]
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| /linux/include/linux/ |
| H A D | kasan.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <linux/kasan-enabled.h>
7 #include <linux/kasan-tags.h>
13 struct page;
32 #define KASAN_VMALLOC_PAGE_RANGE 0x1 /* Apply exsiting page range */
112 void __kasan_poison_pages(struct page *page, unsigned int order, bool init);
113 static __always_inline void kasan_poison_pages(struct page *page, in kasan_poison_pages() argument
117 __kasan_poison_pages(page, order, init); in kasan_poison_pages()
120 bool __kasan_unpoison_pages(struct page *page, unsigned int order, bool init);
121 static __always_inline bool kasan_unpoison_pages(struct page *page, in kasan_unpoison_pages() argument
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| H A D | bvec.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
17 struct page;
20 * struct bio_vec - a contiguous range of physical memory addresses
21 * @bv_page: First page associated with the address range.
29 struct page *bv_page;
35 * bvec_set_page - initialize a bvec based off a struct page
37 * @page: page the bvec should point to
39 * @offset: offset into the page
41 static inline void bvec_set_page(struct bio_vec *bv, struct page *page, in bvec_set_page() argument
44 bv->bv_page = page; in bvec_set_page()
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| /linux/include/xen/arm/ |
| H A D | page.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm/page.h>
9 #include <linux/dma-mapping.h>
22 /* Xen pseudo-physical address */
33 * The pseudo-physical frame (pfn) used in all the helpers is always based
34 * on Xen page granularity (i.e 4KB).
36 * A Linux page may be split across multiple non-contiguous Xen page so we
37 * have to keep track with frame based on 4KB page granularity.
46 /* Pseudo-physical <-> Guest conversion */
57 /* Pseudo-physical <-> BUS conversion */
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: MIT
16 bool "Enable HMM-based shared virtual memory manager"
23 memory manager supports two modes of operation. One based on
24 preemptions and one based on page faults. To enable page fault
25 based memory management on most GFXv9 GPUs, set the module
29 bool "HSA kernel driver support for peer-to-peer for AMD GPU devices"
32 Enable peer-to-peer (P2P) communication between AMD GPUs over
33 the PCIe bus. This can improve performance of multi-GPU compute
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| /linux/drivers/clocksource/ |
| H A D | hyperv_timer.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * provided by the Hyper-V hypervisor to guest VMs, as described
6 * in the Hyper-V Top Level Functional Spec (TLFS). This driver
37 * mechanism is used when running on older versions of Hyper-V
38 * that don't support Direct Mode. While Hyper-V provides
45 * However, for legacy versions of Hyper-V when Direct Mode
52 static int stimer0_irq = -1;
65 ce->event_handler(ce); in hv_stimer0_isr()
71 * per-cpu interrupts, which also implies Direct Mode.
129 * hv_stimer_init - Per-cpu initialization of the clockevent
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| /linux/arch/arm64/include/asm/ |
| H A D | memory.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Based on arch/arm/include/asm/memory.h
5 * Copyright (C) 2000-2002 Russell King
8 * Note: this file should not be included by non-asm/.h files
15 #include <asm/page-def.h>
24 * VMEMMAP_SIZE - allows the whole linear region to be covered by
25 * a struct page array
27 * If we are configured with a 52-bit kernel VA then our VMEMMAP_SIZE
28 * needs to cover the memory region from the beginning of the 52-bit
29 * PAGE_OFFSET all the way to PAGE_END for 48-bit. This allows us to
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| H A D | page.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Based on arch/arm/include/asm/page.h
5 * Copyright (C) 1995-2003 Russell King
11 #include <asm/page-def.h>
17 #include <asm/pgtable-types.h>
19 struct page;
25 void copy_user_highpage(struct page *to, struct page *from,
29 void copy_highpage(struct page *to, struct page *from);
36 void tag_clear_highpage(struct page *to);
39 #define clear_user_page(page, vaddr, pg) clear_page(page) argument
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| /linux/arch/loongarch/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
250 # MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
281 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
284 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
287 def_bool $(cc-option,-Wa$(comma)-mthin-add-sub) || AS_IS_LLVM
290 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
293 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
296 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0)
299 def_bool $(as-instr,hvcl 0)
302 def_bool $(cc-option,-mannotate-tablejump)
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| /linux/mm/ |
| H A D | gup_test.c | 10 static void put_back_pages(unsigned int cmd, struct page **pages, in put_back_pages()
39 static void verify_dma_pinned(unsigned int cmd, struct page **pages, in verify_dma_pinned()
53 "pages[%lu] is NOT dma-pinned\n", i)) { in verify_dma_pinned()
55 dump_page(&folio->page, "gup_test failure"); in verify_dma_pinned()
61 dump_page(&folio->page, "gup_test failure"); in verify_dma_pinned()
69 static void dump_pages_test(struct gup_test *gup, struct page **pages, in dump_pages_test()
76 * Zero out any user-supplied page index that is out of range. Remember: in dump_pages_test()
77 * .which_pages[] contains a 1-based set of page indices. in dump_pages_test()
80 if (gup->which_pages[i] > nr_pages) { in dump_pages_test()
82 i, gup->which_pages[i]); in dump_pages_test()
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
30 compress them into a dynamically allocated RAM-based memory pool.
69 available at the following LWN page:
145 int "Maximum number of physical pages per-zspage"
150 that a zmalloc page (zspage) can consist of. The optimal zspage
226 specifically-sized allocations with user-controlled contents
230 user-controlled allocations. This may very slightly increase
232 of extra pages since the bulk of user-controlled allocations
233 are relatively long-lived.
248 Try running: slabinfo -DA
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| /linux/drivers/net/can/ctucanfd/ |
| H A D | Kconfig | 2 tristate "CTU CAN-FD IP core" if COMPILE_TEST
4 This driver adds support for the CTU CAN FD open-source IP core.
5 More documentation and core sources at project page
8 is available (https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top).
9 Implementation on Intel FPGA-based PCI Express board is available
10 from project (https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd) and
11 on Intel SoC from project (https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd).
12 Guidepost CTU FEE CAN bus projects page https://canbus.pages.fel.cvut.cz/ .
15 tristate "CTU CAN-FD IP core PCI/PCIe driver"
19 This driver adds PCI/PCIe support for CTU CAN-FD IP core.
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| /linux/drivers/mtd/nand/raw/ |
| H A D | nand_bbt.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 * depending on the options in the BBT descriptor(s). If no flash based BBT
16 * If a flash based BBT is specified then the function first tries to find the
18 * based BBT is created. If a mirrored BBT is selected then the mirror is
20 * version number, then the mirror BBT is used to build the memory based BBT.
26 * For manufacturer created BBTs like the one found on M-SYS DOC devices
52 * - bbts start at a page boundary, if autolocated on a block boundary
53 * - the space necessary for a bbt in FLASH does not exceed a block boundary
78 uint8_t entry = chip->bbt[block >> BBT_ENTRY_SHIFT]; in bbt_get_entry()
87 chip->bbt[block >> BBT_ENTRY_SHIFT] |= msk; in bbt_mark_entry()
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| /linux/Documentation/driver-api/cxl/allocation/ |
| H A D | reclaim.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 becomes pressured based on global and cgroup-local `watermark` settings.
21 next demotion node. The next demotion node is based on the :code:`HMAT`
25 --------------------------
32 originally instantiated by another cgroup (such as common libraries - e.g.
40 are typically cold, the result is a cold page becomes promoted - only to
43 In Linux v6.XX, ZSwap tries to prefer the node of the page being compressed
44 as the allocation target for the compression page. This helps prevent
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| /linux/Documentation/arch/x86/ |
| H A D | intel_txt.rst | 6 Technology (Intel(R) TXT), defines platform-level enhancements that
13 - Provides dynamic root of trust for measurement (DRTM)
14 - Data protection in case of improper shutdown
15 - Measurement and verification of launched environment
18 non-vPro systems. It is currently available on desktop systems
19 based on the Q35, X38, Q45, and Q43 Express chipsets (e.g. Dell
20 Optiplex 755, HP dc7800, etc.) and mobile systems based on the GM45,
30 - LinuxTAG 2008:
31 http://www.linuxtag.org/2008/en/conf/events/vp-donnerstag.html
33 - TRUST2008:
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