| /freebsd/crypto/heimdal/lib/hx509/ |
| H A D | test_crypto.in | 40 stat="--statistic-file=${objdir}/statfile"
53 ${hxtool} verify --missing-revoke \
54 --time=2006-09-25 \
55 cert:FILE:$srcdir/data/bleichenbacher-good.pem \
56 anchor:FILE:$srcdir/data/bleichenbacher-good.pem > /dev/null || exit 1
59 ${hxtool} verify --missing-revoke \
60 --time=2006-09-25 \
61 cert:FILE:$srcdir/data/bleichenbacher-bad.pem \
62 anchor:FILE:$srcdir/data/bleichenbacher-bad.pem > /dev/null && exit 1
65 ${hxtool} verify --missing-revoke \
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt8183-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 chassis-type = "embedded";
15 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
27 stdout-path = "serial0:921600n8";
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
35 compatible = "shared-dma-pool";
37 no-map;
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | sprd,pinctrl.txt | 8 pad driving level, system control select and so on ("domain pad
10 related domain pad driving selection, if the related domain pad
11 select 3.0v, then the pin can output 3.0v. "system control" is used
16 of them, so we can not make every Spreadtrum-special configuration
29 to configure the pin sleep mode, function select and sleep related
35 - input-enabl
[all...] |
| H A D | fsl,imx7d-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx7d-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
19 - enum:
20 - fsl,imx7d-iomuxc
21 - fsl,imx7d-iomuxc-lpsr
26 fsl,input-sel:
[all …]
|
| H A D | fsl,imx7d-pinctrl.txt | 3 iMX7D supports two iomuxc controllers, fsl,imx7d-iomuxc controller is similar
4 as previous iMX SoC generation and fsl,imx7d-iomuxc-lpsr which provides low
5 power state retention capabilities on gpios that are part of iomuxc-lpsr
6 (GPIO1_IO7..GPIO1_IO0). While iomuxc-lpsr provides its own set of registers for
7 mux and pad control settings, it shares the input select register from main
8 iomuxc controller for daisy chain settings, the fsl,input-sel property extends
9 fsl,imx-pinctrl driver to support iomuxc-lpsr controller.
11 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
12 compatible = "fsl,imx7d-iomuxc-lpsr";
14 fsl,input-sel = <&iomuxc>;
[all …]
|
| H A D | fsl,imx93-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx93-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
17 - $ref: pinctrl.yaml#
21 const: fsl,imx93-iomuxc
40 be found in <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last
41 integer CONFIG is the pad setting value like pull-up on this pin. Please
[all …]
|
| H A D | fsl,imxrt1050.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Giulio Benetti <giulio.benetti@benettiengineering.com>
11 - Jesse Taube <Mr.Bossman075@gmail.com>
14 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
19 const: fsl,imxrt1050-iomuxc
38 be found in <arch/arm/boot/dts/imxrt1050-pinfunc.h>. The last
39 integer CONFIG is the pad setting value like pull-up on this pin. Please
41 $ref: /schemas/types.yaml#/definitions/uint32-matrix
[all …]
|
| H A D | fsl,imxrt1170.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Giulio Benetti <giulio.benetti@benettiengineering.com>
11 - Jesse Taube <Mr.Bossman075@gmail.com>
14 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
19 const: fsl,imxrt1170-iomuxc
38 be found in <arch/arm/boot/dts/imxrt1170-pinfunc.h>. The last
39 integer CONFIG is the pad setting value like pull-up on this pin. Please
41 $ref: /schemas/types.yaml#/definitions/uint32-matrix
[all …]
|
| H A D | fsl,imx8mm-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8mm-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
18 const: fsl,imx8mm-iomuxc
37 be found in <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last
38 integer CONFIG is the pad setting value like pull-up on this pin. Please
40 $ref: /schemas/types.yaml#/definitions/uint32-matrix
[all …]
|
| H A D | fsl,imx8mn-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8mn-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
18 const: fsl,imx8mn-iomuxc
37 be found in <arch/arm64/boot/dts/freescale/imx8mn-pinfunc.h>. The last
38 integer CONFIG is the pad setting value like pull-up on this pin. Please
40 $ref: /schemas/types.yaml#/definitions/uint32-matrix
[all …]
|
| H A D | fsl,imx8mp-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8mp-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
18 const: fsl,imx8mp-iomuxc
37 be found in <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last
38 integer CONFIG is the pad setting value like pull-up on this pin. Please
40 $ref: /schemas/types.yaml#/definitions/uint32-matrix
[all …]
|
| H A D | fsl,imx8mq-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8mq-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
18 const: fsl,imx8mq-iomuxc
37 be found in <arch/arm64/boot/dts/freescale/imx8mq-pinfunc.h>. The last
38 integer CONFIG is the pad setting value like pull-up on this pin. Please
40 $ref: /schemas/types.yaml#/definitions/uint32-matrix
[all …]
|
| H A D | fsl,imx8m-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8m-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
19 - fsl,imx8mm-iomuxc
20 - fsl,imx8mn-iomuxc
21 - fsl,imx8mp-iomuxc
22 - fsl,imx8mq-iomuxc
[all …]
|
| H A D | fsl,imx9-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx9-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
17 - $ref: pinctrl.yaml#
22 - fsl,imx91-iomuxc
23 - fsl,imx93-iomuxc
42 be found in <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last
[all …]
|
| H A D | fsl,imx6ul-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx6ul-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
17 - $ref: pinctrl.yaml#
22 - fsl,imx6ul-iomuxc
23 - fsl,imx6ull-iomuxc-snvs
42 be found in <arch/arm/boot/dts/imx6ul-pinfunc.h>. The last integer
[all …]
|
| H A D | fsl,imx8ulp-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8ulp-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacky Bai <ping.bai@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
18 const: fsl,imx8ulp-iomuxc1
37 be found in <arch/arm64/boot/dts/freescale/imx8ulp-pinfunc.h>. The last
38 integer CONFIG is the pad setting value like pull-up on this pin. Please
40 $ref: /schemas/types.yaml#/definitions/uint32-matrix
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/firmware/ |
| H A D | nxp,imx95-scmi-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/firmware/nxp,imx95-scmi-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Peng Fan <peng.fan@nxp.com>
14 - $ref: /schemas/pinctrl/pinctrl.yaml
31 be found in <arch/arm64/boot/dts/freescale/imx95-pinfunc.h>. The last
32 integer CONFIG is the pad setting value like pull-up on this pin.
34 $ref: /schemas/types.yaml#/definitions/uint32-matrix
37 - description: |
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/mmc/ |
| H A D | marvell,xenon-sdhci.txt | 11 - compatible: should be one of the following
12 - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC.
13 Must provide a second register area and marvell,pad-type.
14 - "marvell,armada-ap806-sdhci": For controllers on Armada AP806.
15 - "marvell,armada-ap807-sdhci": For controllers on Armada AP807.
16 - "marvell,armada-cp110-sdhci": For controllers on Armada CP110.
18 - clocks:
23 - clock-names:
28 - reg:
29 * For "marvell,armada-3700-sdhci", two register areas.
[all …]
|
| H A D | marvell,xenon-sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhc
[all...] |
| /freebsd/share/misc/ |
| H A D | usb_hid_usages | 4 # - lines that do not start with a white space give the number and name of
6 # - lines that start with a white space give the number and name of
17 0x05 Game Pad
20 0x08 Multi-axis Controller
36 0x3E Select
55 0x89 System Menu Select
62 0x90 D-pad Up
63 0x91 D-pad Down
64 0x92 D-pad Right
65 0x93 D-pad Left
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/display/ |
| H A D | arm,pl11x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liviu Dudau <Liviu.Dudau@arm.com>
11 - Andre Przywara <andre.przywara@arm.com>
18 # We need a select here so we don't match all nodes with 'arm,primecell'
19 select:
24 - arm,pl110
25 - arm,pl111
27 - compatible
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | cadence-nand-controller.txt | 4 - compatible : "cdns,hp-nfc"
5 - reg : Contains two entries, each of which is a tuple consisting of a
9 - reg-names: should contain "reg" and "sdma"
10 - #address-cells: should be 1. The cell encodes the chip select connection.
11 - #size-cells : should be 0.
12 - interrupts : The interrupt number.
13 - clocks: phandle of the controller core clock (nf_clk).
16 - dmas: shall reference DMA channel associated to the NAND controller
17 - cdns,board-delay-ps : Estimated Board delay. The value includes the total
21 board delay = RE#PAD delay + PCB trace to device + PCB trace from device
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/arm/tegra/ |
| H A D | nvidia,tegra186-pmc.txt | 4 - compatible: Should contain one of the following:
5 - "nvidia,tegra186-pmc": for Tegra186
6 - "nvidia,tegra194-pmc": for Tegra194
7 - "nvidia,tegra234-pmc": for Tegra234
8 - reg: Must contain an (offset, length) pair of the register set for each
9 entry in reg-names.
10 - reg-names: Must include the following entries:
11 - "pmc"
12 - "wake"
13 - "aotag"
[all …]
|
| /freebsd/share/man/man4/ |
| H A D | sis.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
63 The SiS 900 is a 100Mbps Ethernet MAC and MII-compliant transceiver
70 The SiS 900 and SiS 7016 both have a 128-bit multicast hash filter
81 .Bl -tag -width 10baseTXUTP
92 option can also be used to select either
93 .Sq full-duplex
95 .Sq half-duplex
102 option can also be used to select either
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm64/allwinner/ |
| H A D | sun50i-h700-anbernic-rg35xx-2024.dts | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
6 /dts-v1/;
8 #include "sun50i-h616.dtsi"
9 #include "sun50i-h616-cpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/linux-event-codes.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/leds/common.h>
17 chassis-type = "handset";
18 compatible = "anbernic,rg35xx-2024", "allwinner,sun50i-h700";
[all …]
|