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Searched +full:otto +full:- +full:timer (Results 1 – 5 of 5) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Drealtek,otto-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/realtek,otto-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek Otto SoCs Timer/Counter
14 - Chris Packham <chris.packham@alliedtelesis.co.nz>
18 pattern: "^timer@[0-9a-f]+$"
22 - enum:
23 - realtek,rtl9302-timer
24 - const: realtek,otto-timer
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/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Drealtek,otto-wdt.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/watchdog/realtek,otto-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek Otto watchdog timer
10 - Sander Vanheule <sander@svanheule.net>
13 The timer has two timeout phases. Both phases have a maximum duration of 32
17 - Phase 1: During this phase, the WDT can be pinged to reset the timeout.
18 - Phase 2: Starts after phase 1 has timed out, and only serves to give the
24 - $ref: watchdog.yaml#
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/freebsd/sys/contrib/device-tree/src/mips/realtek/
H A Drtl930x.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
6 compatible = "realtek,rtl9302-soc";
9 #address-cells = <1>;
10 #size-cells = <0>;
17 clock-names = "cpu";
21 baseclk: clock-800mhz {
22 compatible = "fixed-clock";
23 #clock-cells = <0>;
24 clock-frequency = <800000000>;
27 lx_clk: clock-175mhz {
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/freebsd/crypto/openssl/
H A DCHANGES.md4 This is a high-level summary of the most important changes.
11 ----------------
13 - [OpenSSL 3.0](#openssl-30)
14 - [OpenSSL 1.1.1](#openssl-111)
15 - [OpenSSL 1.1.0](#openssl-110)
16 - [OpenSSL 1.0.2](#openssl-102)
17 - [OpenSSL 1.0.1](#openssl-101)
18 - [OpenSSL 1.0.0](#openssl-100)
19 - [OpenSSL 0.9.x](#openssl-09x)
22 -----------
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/freebsd/share/dict/
H A Dweb299810 Jean-Christophe
99811 Jean-Pierre
133330 Otto
133331 otto
203571 timer