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/linux/Documentation/devicetree/bindings/nvmem/
H A Drockchip,otp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/rockchip,otp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip internal OTP (One Time Programmable) memory
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,px30-otp
16 - rockchip,rk3308-otp
17 - rockchip,rk3576-otp
18 - rockchip,rk3588-otp
[all …]
H A Dnintendo-otp.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/nvmem/nintendo-otp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nintendo Wii and Wii U OTP
10 This binding represents the OTP memory as found on a Nintendo Wii or Wii U,
11 which contains common and per-console keys, signatures and related data
14 See https://wiiubrew.org/wiki/Hardware/OTP
17 - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
20 - $ref: nvmem.yaml#
[all …]
H A Dst,stm32-romem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/st,stm32-romem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Factory-programmed data
10 This represents STM32 Factory-programmed read only non-volatile area: locked
11 flash, OTP, read-only HW regs... This contains various information such as:
16 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
19 - $ref: nvmem.yaml#
20 - $ref: nvmem-deprecated-cells.yaml#
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H A Dmicrochip,lan9662-otpc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/microchip,lan9662-otpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip LAN9662 OTP Controller (OTPC)
10 - Horatiu Vultur <horatiu.vultur@microchip.com>
13 OTP controller drives a NVMEM memory where system specific data
18 - $ref: nvmem.yaml#
23 - items:
24 - const: microchip,lan9668-otpc
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H A Dsunplus,sp7021-ocotp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/nvmem/sunplus,sp7021-ocotp.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: On-Chip OTP Memory for Sunplus SP7021
11 - Vincent Shih <vincent.sunplus@gmail.com>
14 - $ref: nvmem.yaml#
15 - $ref: nvmem-deprecated-cells.yaml#
19 const: sunplus,sp7021-ocotp
22 maxItems: 2
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/linux/drivers/nvmem/
H A Drockchip-otp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip OTP Driver
6 * Author: Finley Xiao <finley.xiao@rock-chips.com>
15 #include <linux/nvmem-provider.h>
22 /* OTP Register Offsets */
35 /* OTP Register bits and masks */
42 #define OTPC_USER_DONE BIT(2)
85 static int rockchip_otp_reset(struct rockchip_otp *otp) in rockchip_otp_reset() argument
89 ret = reset_control_assert(otp->rst); in rockchip_otp_reset()
91 dev_err(otp->dev, "failed to assert otp phy %d\n", ret); in rockchip_otp_reset()
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H A Dsunplus-ocotp.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/nvmem-provider.h>
21 * OTP memory
47 #define OTP_READ BIT(2)
55 #define OTP_LOAD_SECURE_DONE_MASK ~BIT(2)
78 static int sp_otp_read_real(struct sp_ocotp_priv *otp, int addr, char *value) in sp_otp_read_real() argument
94 writel(readl(otp->base[OTPRX] + OTP_STATUS) & OTP_READ_DONE_MASK & in sp_otp_read_real()
95 OTP_LOAD_SECURE_DONE_MASK, otp->base[OTPRX] + OTP_STATUS); in sp_otp_read_real()
96 writel(addr, otp->base[OTPRX] + OTP_READ_ADDRESS); in sp_otp_read_real()
97 writel(readl(otp->base[OTPRX] + OTP_CONTROL_2) | OTP_READ, in sp_otp_read_real()
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H A Dlan9662-otpc.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/nvmem-provider.h>
24 #define OTP_OTP_PASS_FAIL_OTP_WRITE_PROHIBITED BIT(2)
47 static int lan9662_otp_power(struct lan9662_otp *otp, bool up) in lan9662_otp_power() argument
49 void __iomem *pwrdn = OTP_OTP_PWR_DN(otp->base); in lan9662_otp_power()
53 if (lan9662_otp_wait_flag_clear(OTP_OTP_STATUS(otp->base), in lan9662_otp_power()
55 return -ETIMEDOUT; in lan9662_otp_power()
63 static int lan9662_otp_execute(struct lan9662_otp *otp) in lan9662_otp_execute() argument
65 if (lan9662_otp_wait_flag_clear(OTP_OTP_CMD_GO(otp->base), in lan9662_otp_execute()
67 return -ETIMEDOUT; in lan9662_otp_execute()
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H A Dstm32-romem.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Factory-programmed memory read access driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
9 #include <linux/arm-smccc.h>
12 #include <linux/nvmem-provider.h>
18 #include "stm32-bsec-optee-ta.h"
20 /* BSEC secure service access from non-secure */
51 *buf8++ = readb_relaxed(priv->base + i); in stm32_romem_read()
56 static int stm32_bsec_smc(u8 op, u32 otp, u32 data, u32 *result) in stm32_bsec_smc() argument
61 arm_smccc_smc(STM32_SMC_BSEC, op, otp, data, 0, 0, 0, 0, &res); in stm32_bsec_smc()
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H A Dimx-ocotp.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc
21 #include <linux/nvmem-provider.h>
29 * OTP Bank0 Word0
32 * of two consecutive OTP words.
107 void __iomem *base = priv->base; in imx_ocotp_wait_for_busy()
109 bm_ctrl_busy = priv->params->ctrl.bm_busy; in imx_ocotp_wait_for_busy()
110 bm_ctrl_error = priv->params->ctrl.bm_error; in imx_ocotp_wait_for_busy()
114 for (count = 10000; count >= 0; count--) { in imx_ocotp_wait_for_busy()
124 * - A write is performed to a shadow register during a shadow in imx_ocotp_wait_for_busy()
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H A Dstm32-bsec-optee-ta.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * OP-TEE STM32MP BSEC PTA interface, used by STM32 ROMEM driver
5 * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
10 #include "stm32-bsec-optee-ta.h"
13 * Read OTP memory
15 * [in] value[0].a OTP start offset in byte
16 * [in] value[0].b Access type (0:shadow, 1:fuse, 2:lock)
18 * [out] memref[1].size Size of OTP to be read
21 * TEE_SUCCESS - Invoke command success
22 * TEE_ERROR_BAD_PARAMETERS - Incorrect input param
[all …]
H A Dbcm-ocotp.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/nvmem-provider.h>
14 * # of tries for OTP Status. The time to execute a command varies. The slowest
20 /* Sequence to enable OTP program */
31 #define OTPC_STAT_PROG_OK BIT(2)
45 #define OTPC_CMD_MASK (BIT(OTPC_COMMAND_COMMAND_WIDTH) - 1)
46 #define OTPC_ADDR_MASK (BIT(OTPC_CPUADDR_REG_OTPC_CPU_ADDRESS_WIDTH) - 1)
65 .otpc_row_size = 2,
114 return -EAGAIN; in poll_cpu_status()
157 u32 address = offset / priv->config->word_size; in bcm_otpc_read()
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/linux/Documentation/devicetree/bindings/mtd/
H A Dmtd.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
11 - Richard Weinberger <richard@nod.at>
21 User-defined MTD device name. Can be used to assign user friendly
26 '#address-cells':
29 '#size-cells':
36 - compatible
39 "@[0-9a-f]+$":
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/linux/include/linux/mfd/wm831x/
H A Dotp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/linux/mfd/wm831x/otp.h -- OTP interface for WM831x
17 * R30720 (0x7800) - Unique ID 1
19 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
20 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
21 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
24 * R30721 (0x7801) - Unique ID 2
26 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
27 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
28 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
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/linux/drivers/mtd/nand/onenand/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
45 bool "OneNAND OTP Support"
48 a One-Time Programmable Block memory area.
49 Also, 1st Block of NAND Flash Array can be used as OTP.
51 The OTP block can be read, programmed and locked using the same
53 OTP block cannot be erased.
55 OTP block is fully-guaranteed to be a valid block.
58 bool "OneNAND 2X program support"
60 The 2X Program is an extension of Program Operation.
61 Since the device is equipped with two DataRAMs, and two-plane NAND
/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/
H A Dpcie.c1 // SPDX-License-Identifier: ISC
52 BRCMF_FW_DEF(43602, "brcmfmac43602-pcie");
53 BRCMF_FW_DEF(4350, "brcmfmac4350-pcie");
54 BRCMF_FW_DEF(4350C, "brcmfmac4350c2-pcie");
55 BRCMF_FW_CLM_DEF(4355, "brcmfmac4355-pcie");
56 BRCMF_FW_CLM_DEF(4355C1, "brcmfmac4355c1-pcie");
57 BRCMF_FW_CLM_DEF(4356, "brcmfmac4356-pcie");
58 BRCMF_FW_CLM_DEF(43570, "brcmfmac43570-pcie");
59 BRCMF_FW_DEF(4358, "brcmfmac4358-pcie");
60 BRCMF_FW_DEF(4359, "brcmfmac4359-pcie");
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/linux/drivers/crypto/
H A Datmel-sha204a.c1 // SPDX-License-Identifier: GPL-2.0
19 #include "atmel-i2c.h"
24 struct atmel_i2c_client_priv *i2c_priv = work_data->ctx; in atmel_sha204a_rng_done()
28 dev_warn_ratelimited(&i2c_priv->client->dev, in atmel_sha204a_rng_done()
32 rng->priv = (unsigned long)work_data; in atmel_sha204a_rng_done()
33 atomic_dec(&i2c_priv->tfm_count); in atmel_sha204a_rng_done()
45 if (!atomic_add_unless(&i2c_priv->tfm_count, 1, 1)) in atmel_sha204a_rng_read_nonblocking()
48 if (rng->priv) { in atmel_sha204a_rng_read_nonblocking()
49 work_data = (struct atmel_i2c_work_data *)rng->priv; in atmel_sha204a_rng_read_nonblocking()
50 max = min(sizeof(work_data->cmd.data), max); in atmel_sha204a_rng_read_nonblocking()
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/linux/include/linux/ssb/
H A Dssb_driver_chipcommon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * jtag, 0/1/2 uarts, clock frequency control, a watchdog interrupt timer,
30 #define SSB_CHIPCO_CAP_UARTGPIO 0x00000020 /* UARTs on GPIO 15-12 */
41 #define SSB_PLLTYPE_3 0x00030000 /* 25Mhz, 2 dividers */
47 #define SSB_CHIPCO_CAP_OTPS 0x00380000 /* OTP size */
52 #define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */
61 #define SSB_CHIPCO_OTPS 0x0010 /* OTP status */
67 #define SSB_CHIPCO_OTPC 0x0014 /* OTP control */
74 #define SSB_CHIPCO_OTPP 0x0018 /* OTP prog */
116 #define SSB_CHIPCO_JCTL_EXT_EN 2 /* Enable external targets */
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/linux/drivers/net/wireless/intel/iwlwifi/
H A Diwl-agn-hw.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014 Intel Corporation
6 * Please use this file (iwl-agn-hw.h) only for hardware-related definitions.
18 #define IWLAGN_RTC_INST_SIZE (IWLAGN_RTC_INST_UPPER_BOUND - \
20 #define IWLAGN_RTC_DATA_SIZE (IWLAGN_RTC_DATA_UPPER_BOUND - \
28 (IWL60_RTC_INST_UPPER_BOUND - IWL60_RTC_INST_LOWER_BOUND)
30 (IWL60_RTC_DATA_UPPER_BOUND - IWL60_RTC_DATA_LOWER_BOUND)
51 #define OTP_MAX_LL_ITEMS_1000 (3) /* OTP blocks for 1000 */
52 #define OTP_MAX_LL_ITEMS_6x00 (4) /* OTP blocks for 6x00 */
53 #define OTP_MAX_LL_ITEMS_6x50 (7) /* OTP blocks for 6x50 */
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/linux/include/uapi/mtd/
H A Dmtd-abi.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al.
7 * the Free Software Foundation; either version 2 of the License, or
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
55 * @MTD_OPS_RAW: data are transferred as-is, with no error correction;
65 MTD_OPS_RAW = 2,
69 * struct mtd_write_req - data structure for requesting a write operation
74 * @usr_data: user-provided data buffer
75 * @usr_oob: user-provided OOB buffer
80 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
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/linux/Documentation/devicetree/bindings/regulator/
H A Dpalmas-pmic.txt3 The tps659038 for the AM57x class have OTP spins that
5 is not a need to add the OTP spins to the palmas driver. The
11 - compatible : Should be from the list
12 ti,twl6035-pmic
13 ti,twl6036-pmic
14 ti,twl6037-pmic
15 ti,tps65913-pmic
16 ti,tps65914-pmic
17 ti,tps65917-pmic
18 ti,tps659038-pmic
[all …]
/linux/drivers/mtd/nand/raw/
H A Dnand_macronix.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
24 #define MACRONIX_RANDOMIZER_RANDOPT BIT(2)
36 #define MACRONIX_30LFXG18AC_OTP_START_PAGE 2
54 if (!chip->parameters.supports_set_get_features || in macronix_nand_setup_read_retry()
56 chip->parameters.set_feature_list)) in macronix_nand_setup_read_retry()
57 return -ENOTSUPP; in macronix_nand_setup_read_retry()
82 /* RANDEN and RANDOPT OTP bits are programmed */ in macronix_nand_randomizer_check_enable()
104 struct nand_parameters *p = &chip->parameters; in macronix_nand_onfi_init()
110 if (!p->onfi) in macronix_nand_onfi_init()
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/linux/drivers/mfd/
H A Dwm831x-otp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm831x-otp.c -- OTP for Wolfson WM831x PMICs
19 #include <linux/mfd/wm831x/otp.h>
29 for (i = 0; i < WM831X_UNIQUE_ID_LEN / 2; i++) { in wm831x_unique_id_read()
34 id[i * 2] = (val >> 8) & 0xff; in wm831x_unique_id_read()
35 id[(i * 2) + 1] = val & 0xff; in wm831x_unique_id_read()
62 ret = device_create_file(wm831x->dev, &dev_attr_unique_id); in wm831x_otp_init()
64 dev_err(wm831x->dev, "Unique ID attribute not created: %d\n", in wm831x_otp_init()
71 dev_err(wm831x->dev, "Failed to read UUID: %d\n", ret); in wm831x_otp_init()
78 device_remove_file(wm831x->dev, &dev_attr_unique_id); in wm831x_otp_exit()
/linux/Documentation/devicetree/bindings/watchdog/
H A Ddlg,da9062-watchdog.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/dlg,da9062-watchdog.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Dialog Semiconductor DA906{1,2,3} Watchdog Timer
10 - Steve Twiss <stwiss.opensource@diasemi.com>
13 - $ref: watchdog.yaml#
18 - enum:
19 - dlg,da9062-watchdog
20 - dlg,da9063-watchdog
[all …]
/linux/drivers/net/wireless/mediatek/mt76/
H A Ddebugfs.c1 // SPDX-License-Identifier: ISC
12 __mt76_wr(dev, dev->debugfs_reg, val); in mt76_reg_set()
21 *val = __mt76_rr(dev, dev->debugfs_reg); in mt76_reg_get()
34 return -EOPNOTSUPP; in mt76_napi_threaded_set()
36 if (dev->napi_dev->threaded != val) in mt76_napi_threaded_set()
37 return dev_set_threaded(dev->napi_dev, val); in mt76_napi_threaded_set()
47 *val = dev->napi_dev->threaded; in mt76_napi_threaded_get()
56 struct mt76_dev *dev = dev_get_drvdata(s->private); in mt76_queues_read()
59 seq_puts(s, " queue | hw-queued | head | tail |\n"); in mt76_queues_read()
60 for (i = 0; i < ARRAY_SIZE(dev->phy.q_tx); i++) { in mt76_queues_read()
[all …]

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