| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | rockchip,inno-usb2phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,px30-usb2phy
16 - rockchip,rk3036-usb2phy
17 - rockchip,rk3128-usb2phy
18 - rockchip,rk3228-usb2phy
19 - rockchip,rk3308-usb2phy
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| H A D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
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| H A D | nvidia,tegra186-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
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| H A D | nvidia,tegra124-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
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| H A D | nvidia,tegra210-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
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| H A D | allwinner,sun8i-h3-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-h3-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#phy-cells":
19 - allwinner,sun8i-h3-usb-phy
20 - allwinner,sun50i-h616-usb-phy
24 - description: PHY Control registers
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| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | stericsson,dma40.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DMA40 DMA Engine
10 - Linus Walleij <linus.walleij@linaro.org>
13 - $ref: dma-controller.yaml#
16 "#dma-cells":
26 4: I2C port 1
27 5: I2C port 3
28 6: I2C port 2
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | cdns,usb3.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence USBSS-DRD controller
10 - Pawel Laszczak <pawell@cadence.com>
18 - description: OTG controller registers
19 - description: XHCI Host controller registers
20 - description: DEVICE controller registers
22 reg-names:
24 - const: otg
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| H A D | dwc2.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DesignWare HS OTG USB 2.0 controller
10 - Rob Herring <robh@kernel.org>
13 - $ref: usb-drd.yaml#
14 - $ref: usb-hcd.yaml#
19 - const: brcm,bcm2835-usb
20 - const: hisilicon,hi6220-usb
21 - const: ingenic,jz4775-otg
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| H A D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
23 connected to the Glue to serve as OTG ID change detection.
26 host-only mode.
33 - amlogic,meson-gxl-usb-ctrl
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| H A D | mediatek,mtu3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
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| /linux/Documentation/ABI/stable/ |
| H A D | sysfs-class-udc | 6 Indicates if an OTG A-Host supports HNP at an alternate port.
14 Indicates if an OTG A-Host supports HNP at this port.
22 Indicates if an OTG A-Host enabled HNP support.
30 Indicates the current negotiated speed at this port.
38 Indicates that this port is the default Host on an OTG session
47 Indicates that this port support OTG.
55 Indicates the maximum USB speed supported by this port.
81 states are: 'not-attached', 'attached', 'powered',
|
| /linux/arch/arm/mach-pxa/ |
| H A D | pxa27x-udc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include "pxa-regs.h"
12 #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */
13 #define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation
14 Protocol Port Support */
15 #define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol
17 #define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol
19 #define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */
44 #define UDCICR1_IECC (1 << 31) /* IntEn - Configuration Change */
45 #define UDCICR1_IESOF (1 << 30) /* IntEn - Start of Frame */
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| /linux/Documentation/driver-api/usb/ |
| H A D | gadget.rst | 11 This document presents a Linux-USB "Gadget" kernel mode API, for use
17 - Supports USB 2.0, for high speed devices which can stream data at
20 - Handles devices with dozens of endpoints just as well as ones with
21 just two fixed-function ones. Gadget drivers can be written so
22 they're easy to port to new hardware.
24 - Flexible enough to expose more complex USB device capabilities such
28 - USB "On-The-Go" (OTG) support, in conjunction with updates to the
29 Linux-USB host side.
31 - Sharing data structures and API models with the Linux-USB host side
32 API. This helps the OTG support, and looks forward to more-symmetric
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| /linux/drivers/usb/musb/ |
| H A D | musb_virthub.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * MUSB OTG driver virtual root hub support
6 * Copyright (C) 2005-2006 by Texas Instruments
7 * Copyright (C) 2006-2007 Nokia Corporation
29 spin_lock_irqsave(&musb->lock, flags); in musb_host_finish_resume()
31 power = musb_readb(musb->mregs, MUSB_POWER); in musb_host_finish_resume()
33 musb_dbg(musb, "root port resume stopped, power %02x", power); in musb_host_finish_resume()
34 musb_writeb(musb->mregs, MUSB_POWER, power); in musb_host_finish_resume()
41 musb->is_active = 1; in musb_host_finish_resume()
42 musb->port1_status &= ~(USB_PORT_STAT_SUSPEND | MUSB_PORT_STAT_RESUME); in musb_host_finish_resume()
[all …]
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| /linux/Documentation/firmware-guide/acpi/ |
| H A D | extcon-intel-int3496.rst | 6 devices with an acpi-id of INT3496, such as found for example on
9 This ACPI device describes how the OS can read the id-pin of the devices'
10 USB-otg port, as well as how it optionally can enable Vbus output on the
11 otg port and how it can optionally control the muxing of the data pins
18 Index 0 The input gpio for the id-pin, this is always present and valid
19 Index 1 The output gpio for enabling Vbus output from the device to the otg
20 port, write 1 to enable the Vbus output (this gpio descriptor may
|
| /linux/drivers/usb/phy/ |
| H A D | phy-fsl-usb.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
4 #include <linux/usb/otg-fsm.h>
5 #include <linux/usb/otg.h>
30 /* bit 9-8 are async schedule park mode count */
37 /* bit 23-16 are interrupt threshold control */
77 /* PORTSC Register Bit Masks,Only one PORT in OTG mode*/
99 /* bit 11-10 are line status */
106 /* bit 15-14 are port indicator control */
113 /* bit 19-16 are port test control */
122 /* bit 27-26 are port speed */
[all …]
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| /linux/Documentation/usb/ |
| H A D | chipidea.rst | 5 1. How to test OTG FSM(HNP and SRP)
6 -----------------------------------
8 To show how to demo OTG HNP and SRP functions via sys input files
11 1.1 How to enable OTG FSM
12 -------------------------
18 variables for otg fsm, mount debugfs, there are 2 files
19 which can show otg fsm variables and some controller registers value::
21 cat /sys/kernel/debug/ci_hdrc.0/otg
29 otg-rev = <0x0200>;
30 adp-disable;
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| /linux/drivers/phy/tegra/ |
| H A D | xusb.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate()
32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate()
34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate()
35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
45 phy = ERR_PTR(-ENODEV); in tegra_xusb_pad_of_xlate()
53 .compatible = "nvidia,tegra124-xusb-padctl",
[all …]
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3588-tiger-haikou.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/soc/rockchip,vop2.h>
9 #include "rk3588-tiger.dtsi"
12 model = "Theobroma Systems RK3588-Q7 SoM on Haikou devkit";
13 compatible = "tsd,rk3588-tiger-haikou", "tsd,rk3588-tiger", "rockchip,rk3588";
21 stdout-path = "serial2:115200n8";
24 dc_12v: regulator-dc-12v {
25 compatible = "regulator-fixed";
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| /linux/include/linux/platform_data/ |
| H A D | usb-omap1.h | 15 * - "A" connector (rectagular)
17 * - "B" connector (squarish) or "Mini-B"
19 * - "Mini-AB" connector (very similar to Mini-B)
20 * ... for OTG use as device OR host, initialize "otg"
24 u8 otg; /* port number, 1-based: usb1 == 2 */ member
26 const char *extcon; /* extcon device for OTG */
30 /* implicitly true if otg: host supports remote wakeup? */
35 * 2 == usb0-only, using internal transceiver
|
| /linux/Documentation/devicetree/bindings/power/supply/ |
| H A D | richtek,rt9467.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
11 - ChiaEn Wu <chiaen_wu@richtek.com>
14 RT9467 is a switch-mode single cell Li-Ion/Li-Polymer battery charger for
16 MOSFETs, input current sensing and regulation, high-accuracy voltage
20 The RT9467 also features USB On-The-Go (OTG) support. It also integrates
21 D+/D- pin for USB host/charging port detection.
24 https://www.richtek.com/assets/product_file/RT9467/DS9467-01.pdf
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| /linux/drivers/phy/rockchip/ |
| H A D | phy-rockchip-inno-usb2.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
11 #include <linux/extcon-provider.h>
28 #include <linux/usb/otg.h>
50 * enum usb_chg_state - Different states involved in USB charger detection.
89 * struct rockchip_chg_det_reg - usb charger detect registers
90 * @cp_det: charging port detected successfully.
91 * @dcp_det: dedicated charging port detected successfully.
115 * struct rockchip_usb2phy_port_cfg - usb-phy port configuration.
169 * struct rockchip_usb2phy_cfg - usb-phy configuration.
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| /linux/drivers/usb/core/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
30 Documentation/driver-api/usb/persist.rst for more info.
43 no more than 30 seconds (as required by the USB OTG spec).
45 Say N here unless you require new-device enumeration failure to
60 bool "OTG support"
63 The most notable feature of USB OTG is support for a
64 "Dual-Role" device, which can act as either a device
69 Select this only if your board has Mini-AB/Micro-AB
73 bool "Rely on OTG and EH Targeted Peripherals List"
79 USB OTG and EH specification for all devices not on your product's
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| /linux/drivers/usb/gadget/udc/ |
| H A D | pxa27x_udc.h | 1 // SPDX-License-Identifier: GPL-2.0+
4 * Intel PXA27x on-chip full speed USB device controller
16 #include <linux/usb/otg.h>
28 #define UDCOTGICR 0x0018 /* UDC On-The-Go interrupt control */
29 #define UP2OCR 0x0020 /* USB Port 2 Output Control register */
30 #define UP3OCR 0x0024 /* USB Port 3 Output Control register */
36 #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */
37 #define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation
38 Protocol Port Support */
39 #define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol
[all …]
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