Home
last modified time | relevance | path

Searched +full:orion +full:- +full:xor (Results 1 – 15 of 15) sorted by relevance

/linux/Documentation/devicetree/bindings/dma/
H A Dmarvell,orion-xor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/marvell,orion-xor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell XOR engine
10 - Andrew Lunn <andrew@lunn.ch>
11 - Gregory Clement <gregory.clement@bootlin.com>
16 - items:
17 - const: marvell,armada-380-xor
18 - const: marvell,orion-xor
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&intc>;
14 #address-cells = <1>;
15 #size-cells = <0>;
22 clock-names = "cpu_clk", "ddrclk", "powersave";
33 compatible = "marvell,kirkwood-mbus", "simple-bus";
[all …]
H A Dorion5x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 interrupt-parent = <&intc>;
18 #address-cells = <2>;
19 #size-cells = <1>;
22 devbus_bootcs: devbus-bootcs {
23 compatible = "marvell,orion-devbus";
26 #address-cells = <1>;
[all …]
H A Darmada-xp-98dx3236.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 #include "armada-370-xp.dtsi"
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,98dx3236-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
[all …]
H A Darmada-370.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 #include "armada-370-xp.dtsi"
18 #address-cells = <1>;
19 #size-cells = <1>;
22 compatible = "marvell,armada370", "marvell,armada-370-xp";
31 compatible = "marvell,armada370-mbus", "simple-bus";
39 compatible = "marvell,armada-370-pcie";
43 #address-cells = <3>;
[all …]
H A Darmada-xp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
16 #include "armada-370-xp.dtsi"
19 #address-cells = <2>;
20 #size-cells = <2>;
23 compatible = "marvell,armadaxp", "marvell,armada-370-xp";
31 compatible = "marvell,armadaxp-mbus", "simple-bus";
38 internal-regs {
40 compatible = "marvell,armada-xp-sdram-controller";
[all …]
H A Darmada-375.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/phy/phy.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
[all …]
H A Ddove.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
12 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "marvell,pj4a", "marvell,sheeva-v7";
27 next-level-cache = <&l2>;
[all …]
H A Darmada-38x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
32 compatible = "arm,cortex-a9-pmu";
33 interrupts-extended = <&mpic 3>;
37 compatible = "marvell,armada380-mbus", "simple-bus";
[all …]
H A Darmada-39x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
33 enable-method = "marvell,armada-390-smp";
37 compatible = "arm,cortex-a9";
[all …]
/linux/arch/arm/plat-orion/
H A Dcommon.c2 * arch/arm/plat-orion/common.c
4 * Marvell Orion SoC common setup code used by multiple mach-/common.c
14 #include <linux/dma-mapping.h>
21 #include <linux/platform_data/dma-mv_xor.h>
22 #include <linux/platform_data/usb-ehci-orion.h>
33 /* Create clkdev entries for all orion platforms except kirkwood.
35 its own clkdev entries. For all the other orion devices, create
57 device->resource = resources; in fill_resources()
58 device->num_resources = 1; in fill_resources()
72 device->num_resources++; in fill_resources_irq()
[all …]
/linux/arch/arm/mach-orion5x/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-orion5x/common.c
5 * Core functions for Marvell Orion 5x SoCs
14 #include <linux/dma-mapping.h>
19 #include <linux/clk-provider.h>
27 #include <linux/platform_data/mtd-orion_nand.h>
28 #include <linux/platform_data/usb-ehci-orion.h>
32 #include "bridge-regs.h"
149 * XOR engine
181 .id = -1,
[all …]
/linux/arch/arm/mach-dove/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-dove/common.c
8 #include <linux/clk-provider.h>
9 #include <linux/dma-mapping.h>
12 #include <linux/platform_data/dma-mv_xor.h>
13 #include <linux/platform_data/usb-ehci-orion.h>
16 #include <asm/hardware/cache-tauros2.h>
23 #include "bridge-regs.h"
27 /* These can go away once Dove uses the mvebu-mbus DT binding */
113 orion_clkdev_add(NULL, "orion-ehci.0", usb0); in dove_clk_init()
[all …]
/linux/drivers/dma/
H A Dmv_xor.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * offload engine driver for the Marvell XOR engine
10 #include <linux/dma-mapping.h>
21 #include <linux/platform_data/dma-mv_xor.h>
46 ((chan)->dmadev.dev)
52 struct mv_xor_desc *hw_desc = desc->hw_desc; in mv_desc_init()
54 hw_desc->status = XOR_DESC_DMA_OWNED; in mv_desc_init()
55 hw_desc->phy_next_desc = 0; in mv_desc_init()
56 /* Enable end-of-descriptor interrupts only for DMA_PREP_INTERRUPT */ in mv_desc_init()
57 hw_desc->desc_command = (flags & DMA_PREP_INTERRUPT) ? in mv_desc_init()
[all …]
/linux/arch/arm/mach-mv78xx0/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-mv78xx0/common.c
14 #include <linux/clk-provider.h>
16 #include <asm/hardware/cache-feroceon-l2.h>
19 #include <linux/platform_data/usb-ehci-orion.h>
20 #include <linux/platform_data/mtd-orion_nand.h>
23 #include <plat/addr-map.h>
25 #include "bridge-regs.h"
148 * Map the right set of per-core registers depending on in mv78xx0_map_io()
237 eth_data->phy_addr = MV643XX_ETH_PHY_NONE; in mv78xx0_ge10_init()
[all …]