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Searched +full:orion +full:- +full:spi (Results 1 – 21 of 21) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dmarvell,orion-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/marvell,orion-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell Orion SPI controller
10 - Andrew Lunn <andrew@lunn.ch>
11 - Gregory CLEMENT <gregory.clement@bootlin.com>
14 - $ref: /schemas/spi/spi-controller.yaml#
19 - enum:
20 - marvell,orion-spi
[all …]
H A Dspi-orion.txt1 Marvell Orion SPI device
4 - compatible : should be on of the following:
5 - "marvell,orion-spi" for the Orion, mv78x00, Kirkwood and Dove SoCs
6 - "marvell,armada-370-spi", for the Armada 370 SoCs
7 - "marvell,armada-375-spi", for the Armada 375 SoCs
8 - "marvell,armada-380-spi", for the Armada 38x SoCs
9 - "marvell,armada-390-spi", for the Armada 39x SoCs
10 - "marvell,armada-xp-spi", for the Armada XP SoCs
11 - reg : offset and length of the register set for the device.
13 the SPI direct access mode that some of the Marvell SoCs support
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Dorion5x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 interrupt-parent = <&intc>;
18 #address-cells = <2>;
19 #size-cells = <1>;
22 devbus_bootcs: devbus-bootcs {
23 compatible = "marvell,orion-devbus";
26 #address-cells = <1>;
[all …]
H A Dkirkwood.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&intc>;
14 #address-cells = <1>;
15 #size-cells = <0>;
22 clock-names = "cpu_clk", "ddrclk", "powersave";
33 compatible = "marvell,kirkwood-mbus", "simple-bus";
[all …]
H A Darmada-375.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/phy/phy.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
[all …]
H A Darmada-370.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 #include "armada-370-xp.dtsi"
18 #address-cells = <1>;
19 #size-cells = <1>;
22 compatible = "marvell,armada370", "marvell,armada-370-xp";
31 compatible = "marvell,armada370-mbus", "simple-bus";
39 compatible = "marvell,armada-370-pcie";
43 #address-cells = <3>;
[all …]
H A Ddove.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
12 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "marvell,pj4a", "marvell,sheeva-v7";
27 next-level-cache = <&l2>;
[all …]
H A Darmada-xp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
16 #include "armada-370-xp.dtsi"
19 #address-cells = <2>;
20 #size-cells = <2>;
23 compatible = "marvell,armadaxp", "marvell,armada-370-xp";
31 compatible = "marvell,armadaxp-mbus", "simple-bus";
38 internal-regs {
40 compatible = "marvell,armada-xp-sdram-controller";
[all …]
H A Darmada-38x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
32 compatible = "arm,cortex-a9-pmu";
33 interrupts-extended = <&mpic 3>;
37 compatible = "marvell,armada380-mbus", "simple-bus";
[all …]
H A Darmada-39x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
33 enable-method = "marvell,armada-390-smp";
37 compatible = "arm,cortex-a9";
[all …]
H A Darmada-xp-98dx3236.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 #include "armada-370-xp.dtsi"
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,98dx3236-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
[all …]
H A Darmada-370-xp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
20 compatible = "marvell,armada-370-xp";
28 #address-cells = <1>;
29 #size-cells = <0>;
31 compatible = "marvell,sheeva-v7";
38 compatible = "arm,cortex-a9-pmu";
39 interrupts-extended = <&mpic 3>;
43 #address-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dmvebu-core-clock.txt4 reading the Sample-At-Reset (SAR) register. The core clock consumer should
52 - compatible : shall be one of the following:
53 "marvell,armada-370-core-clock" - For Armada 370 SoC core clocks
54 "marvell,armada-375-core-clock" - For Armada 375 SoC core clocks
55 "marvell,armada-380-core-clock" - For Armada 380/385 SoC core clocks
56 "marvell,armada-390-core-clock" - For Armada 39x SoC core clocks
57 "marvell,armada-xp-core-clock" - For Armada XP SoC core clocks
58 "marvell,mv98dx3236-core-clock" - For 98dx3236 family SoC core clocks
59 "marvell,dove-core-clock" - for Dove SoC core clocks
60 "marvell,kirkwood-core-clock" - for Kirkwood SoC (except mv88f6180)
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Dac5-98dx25xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <2>;
21 #size-cells = <0>;
23 cpu-map {
36 compatible = "arm,cortex-a55";
[all …]
H A Darmada-37xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
32 psci-area@4000000 {
[all …]
H A Darmada-cp11x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
9 #include <dt-bindings/thermal/thermal.h>
11 #include "armada-common.dtsi"
27 thermal-zones {
28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(ic-thermal) {
29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
42 cooling-maps { };
[all …]
/freebsd/sys/contrib/device-tree/Bindings/fpga/
H A Dxilinx-slave-serial.txt1 Xilinx Slave Serial SPI FPGA Manager
3 Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the
5 The slave serial link is not technically SPI, and might require extra
6 circuits in order to play nicely with other SPI slaves on the same bus.
9 - https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
10 - https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
11 - https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
14 - compatible: should contain "xlnx,fpga-slave-serial"
15 - reg: spi chip select of the FPGA
16 - prog_b-gpios: config pin (referred to as PROGRAM_B in the manual)
[all …]
/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Dtrivial-rtc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/rtc/trivial-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
18 - $ref: rtc.yaml#
23 # AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface
24 - abracon,abb5zes3
25 # AB-RTCMC-32.768kHz-EOZ9: Real Time Clock/Calendar Module with I2C Interface
26 - abracon,abeoz9
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dfsl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
17 - description: i.MX1 based Boards
19 - enum:
20 - armadeus,imx1-apf9328
21 - fsl,imx1ads
22 - const: fsl,imx1
24 - description: i.MX23 based Boards
[all …]
/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2025-10-18 03:15:01
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
42 7a0b SPI Controller
51 7a19 PCI-to-PCI Bridge
[all …]
H A Dusb_vendors6 # http://www.linux-usb.org/usb-ids.html
7 # or send entries as patches (diff -u old new) in the
10 # http://www.linux-usb.org/usb.ids
13 # Date: 2025-09-15 20:34:02
20 # device device_name <-- single tab
21 # interface interface_name <-- two tabs
38 5301 GW-US54ZGL 802.11bg
54 145f NW-3100 802.11b/g 54Mbps Wireless Network Adapter [zd1211]
64 0200 TP-Link
86 120e ASI120MC-S Planetary Camera
[all …]