Searched +full:opp +full:- +full:480000000 (Results 1 – 10 of 10) sorted by relevance
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 cpu_opp_table: opp-table-cpu {7 compatible = "allwinner,sun50i-h6-operating-points";8 nvmem-cells = <&cpu_speed_grade>;9 opp-shared;11 opp-480000000 {12 clock-latency-ns = <244144>; /* 8 32k periods */13 opp-hz = /bits/ 64 <480000000>;15 opp-microvolt-speed0 = <880000 880000 1200000>;16 opp-microvolt-speed1 = <820000 820000 1200000>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)5 cpu_opp_table: opp-table-cpu {6 compatible = "allwinner,sun50i-h616-operating-points";7 nvmem-cells = <&cpu_speed_grade>;8 opp-shared;10 opp-480000000 {11 opp-hz = /bits/ 64 <480000000>;12 opp-microvolt = <900000>;13 clock-latency-ns = <244144>; /* 8 32k periods */14 opp-supported-hw = <0x3f>;[all …]
1 // SPDX-License-Identifier: GPL-2.04 core_opp_table: opp-table-core {5 compatible = "operating-points-v2";6 opp-shared;8 core_opp_950: opp-950000 {9 opp-microvolt = <950000 950000 1300000>;10 opp-level = <950000>;13 core_opp_1000: opp-1000000 {14 opp-microvolt = <1000000 1000000 1300000>;15 opp-level = <1000000>;[all …]
1 // SPDX-License-Identifier: GPL-2.04 core_opp_table: opp-table-core {5 compatible = "operating-points-v2";6 opp-shared;8 core_opp_950: opp-950000 {9 opp-microvolt = <950000 950000 1350000>;10 opp-level = <950000>;13 core_opp_1000: opp-1000000 {14 opp-microvolt = <1000000 1000000 1350000>;15 opp-level = <1000000>;[all …]
2 * Copyright 2014 Chen-Yu Tsai4 * Chen-Yu Tsai <wens@csie.org>6 * This file is dual-licensed: you can use it either under the terms45 #include "sun8i-a23-a33.dtsi"46 #include <dt-bindings/thermal/thermal.h>49 cpu0_opp_table: opp-table-cpu {50 compatible = "operating-points-v2";51 opp-shared;53 opp-120000000 {54 opp-hz = /bits/ 64 <120000000>;[all …]
6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/interrupt-controller/arm-gic.h>47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>48 #include <dt-bindings/clock/sun8i-de2.h>49 #include <dt-bindings/clock/sun8i-r-ccu.h>50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>51 #include <dt-bindings/reset/sun8i-de2.h>52 #include <dt-bindings/reset/sun8i-r-ccu.h>53 #include <dt-bindings/thermal/thermal.h>56 interrupt-parent = <&gic>;[all …]
1 // SPDX-License-Identifier: GPL-2.014 #include <dt-bindings/clock/exynos5420.h>15 #include <dt-bindings/clock/exynos-audss-clk.h>16 #include <dt-bindings/interrupt-controller/arm-gic.h>37 bus_disp1: bus-disp1 {38 compatible = "samsung,exynos-bus";40 clock-names = "bus";44 bus_disp1_fimd: bus-disp1-fimd {45 compatible = "samsung,exynos-bus";47 clock-names = "bus";[all …]
1 // SPDX-License-Identifier: GPL-2.0+6 #include <dt-bindings/clock/rk3128-cru.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/pinctrl/rockchip.h>11 #include <dt-bindings/power/rk3128-power.h>15 interrupt-parent = <&gic>;16 #address-cells = <1>;17 #size-cells = <1>;[all …]
1 // SPDX-License-Identifier: BSD-3-Clause3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>10 #include <dt-bindings/clock/qcom,gcc-msm8976.h>11 #include <dt-bindings/clock/qcom,rpmcc.h>12 #include <dt-bindings/gpio/gpio.h>13 #include <dt-bindings/interrupt-controller/arm-gic.h>14 #include <dt-bindings/interrupt-controller/irq.h>15 #include <dt-bindings/power/qcom-rpmpd.h>18 interrupt-parent = <&intc>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/px30-cru.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/pinctrl/rockchip.h>11 #include <dt-bindings/power/px30-power.h>12 #include <dt-bindings/soc/rockchip,boot-mode.h>13 #include <dt-bindings/thermal/thermal.h>18 interrupt-parent = <&gic>;[all …]