/freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
H A D | tegra30-cpu-opp-microvolt.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 cpu0_opp_table: opp-table-cpu0 { 5 opp-51000000-800 { 6 opp-microvolt = <800000 800000 1250000>; 9 opp-51000000-850 { 10 opp-microvolt = <850000 850000 1250000>; 13 opp-51000000-912 { 14 opp-microvolt = <912000 912000 1250000>; 17 opp-102000000-800 { 18 opp-microvolt = <800000 800000 1250000>; [all …]
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H A D | tegra30-cpu-opp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 cpu0_opp_table: opp-table-cpu0 { 5 compatible = "operating-points-v2"; 6 opp-shared; 8 opp-51000000-800 { 9 clock-latency-ns = <100000>; 10 opp-supported-hw = <0x1F 0x31FE>; 11 opp-hz = /bits/ 64 <51000000>; 14 opp-51000000-850 { 15 clock-latency-ns = <100000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/samsung/ |
H A D | exynos5800.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 20 compatible = "samsung,exynos5800-clock", "syscon"; 24 opp-2000000000 { 25 opp-hz = /bits/ 64 <2000000000>; 26 opp-microvolt = <1312500 1312500 1500000>; 27 clock-latency-ns = <140000>; 29 opp-1900000000 { 30 opp-hz = /bits/ 64 <1900000000>; 31 opp-microvolt = <1262500 1262500 1500000>; 32 clock-latency-ns = <140000>; [all …]
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H A D | exynos4212.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 23 #address-cells = <1>; 24 #size-cells = <0>; 26 cpu-map { 39 compatible = "arm,cortex-a9"; 42 clock-names = "cpu"; 43 operating-points-v2 = <&cpu0_opp_table>; 44 #cooling-cells = <2>; /* min followed by max */ 49 compatible = "arm,cortex-a9"; 52 clock-names = "cpu"; [all …]
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H A D | exynos4412.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 23 #address-cells = <1>; 24 #size-cells = <0>; 26 cpu-map { 45 compatible = "arm,cortex-a9"; 48 clock-names = "cpu"; 49 operating-points-v2 = <&cpu0_opp_table>; 50 #cooling-cells = <2>; /* min followed by max */ 55 compatible = "arm,cortex-a9"; 58 clock-names = "cpu"; [all …]
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H A D | exynos5422-odroidxu3-lite.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Hardkernel Odroid XU3-Lite board device tree source 11 /dts-v1/; 12 #include "exynos5422-odroidxu3-common.dtsi" 13 #include "exynos5422-odroidxu3-audio.dtsi" 14 #include "exynos54xx-odroidxu-leds.dtsi" 18 compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5"; 34 samsung,asv-bin = <2>; 38 * Odroid XU3-Lite board uses SoC revision with lower maximum frequencies 43 /delete-node/opp-2000000000; [all …]
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H A D | exynos5250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 17 #include <dt-bindings/clock/exynos5250.h> 19 #include "exynos4-cpu-thermal.dtsi" 20 #include <dt-bindings/clock/exynos-audss-clk.h> 46 #address-cells = <1>; 47 #size-cells = <0>; 49 cpu-map { 62 compatible = "arm,cortex-a15"; 65 clock-names = "cpu"; 66 operating-points-v2 = <&cpu0_opp_table>; [all …]
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H A D | exynos5420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 14 #include <dt-bindings/clock/exynos5420.h> 15 #include <dt-bindings/clock/exynos-audss-clk.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 37 bus_disp1: bus-disp1 { 38 compatible = "samsung,exynos-bus"; 40 clock-names = "bus"; 44 bus_disp1_fimd: bus-disp1-fimd { 45 compatible = "samsung,exynos-bus"; 47 clock-names = "bus"; [all …]
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H A D | exynos5800-peach-pi.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pi-rev16", [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-am625-phyboard-lyra-1-4-ghz-opp.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 7 /dts-v1/; 11 regulator-min-microvolt = <850000>; 12 regulator-max-microvolt = <850000>; 16 opp-1400000000 { 17 opp-hz = /bits/ 64 <1400000000>; 18 opp-supported-hw = <0x01 0x0004>;
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H A D | k3-am625-sk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include "k3-am62x-sk-common.dtsi" 13 compatible = "ti,am625-sk", "ti,am625"; 16 opp-table { 17 /* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */ 18 opp-1400000000 { 19 opp-hz = /bits/ 64 <1400000000>; 20 opp-supported-hw = <0x01 0x0004>; [all …]
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H A D | k3-am625-beagleplay.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 6 * Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation 9 /dts-v1/; 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include "k3-am625.dtsi" 17 compatible = "beagle,am625-beagleplay", "ti,am625"; 44 stdout-path = "serial2:115200n8"; [all …]
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H A D | k3-am62-verdin.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 7 * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/net/ti-dp83867.h> 18 stdout-path = "serial2:115200n8"; 46 compatible = "gpio-usb-b-connector", "usb-b-connector"; 47 pinctrl-names = "default"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/opp/ |
H A D | opp-v2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic OPP (Operating Performance Points) 10 - Viresh Kumar <viresh.kumar@linaro.org> 13 - $ref: opp-v2-base.yaml# 17 const: operating-points-v2 22 - | 24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states [all …]
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H A D | opp.txt | 1 Generic OPP (Operating Performance Points) Bindings 2 ---------------------------------------------------- 4 Devices work at voltage-current-frequency combinations and some implementations 10 This document contain multiple versions of OPP binding and only one of them 13 Binding 1: operating-points 16 This binding only supports voltage-frequency pairs. 19 - operating-points: An array of 2-tuples items, and each item consists 20 of frequency and voltage like <freq-kHz vol-uV>. 27 compatible = "arm,cortex-a9"; 29 next-level-cache = <&L2>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/socionext/ |
H A D | uniphier-pro5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 compatible = "socionext,uniphier-pro5"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 #address-cells = <1>; 17 #size-cells = <0>; 21 compatible = "arm,cortex-a9"; 24 enable-method = "psci"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt8365.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 10 #include <dt-bindings/clock/mediatek,mt8365-clk.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/power/mediatek,mt8365-power.h> 18 interrupt-parent = <&sysirq>; 19 #address-cells = <2>; 20 #size-cells = <2>; 23 #address-cells = <1>; [all …]
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H A D | mt8186.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com> 6 /dts-v1/; 7 #include <dt-bindings/clock/mt8186-clk.h> 8 #include <dt-bindings/gce/mt8186-gce.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/memory/mt8186-memory-port.h> 12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h> 13 #include <dt-bindings/power/mt8186-power.h> [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
H A D | exynos5433.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 16 #include <dt-bindings/clock/exynos5433.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 21 #address-cells = <2>; 22 #size-cells = <2>; 24 interrupt-parent = <&gic>; 26 arm-a53-pmu { 27 compatible = "arm,cortex-a53-pmu"; 32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 35 arm-a57-pmu { [all …]
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