| /linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/ |
| H A D | spec_operation.json | 12 "PublicDescription": "Counts operations that have been speculatively executed."
16 …ublicDescription": "Counts micro-operations speculatively executed. This is the count of the numbe…
20 …operations issued by the CPU. This event counts unaligned accesses (as defined by the actual instr…
24 …"PublicDescription": "Counts unaligned memory write operations issued by the CPU. This event count…
28 …"PublicDescription": "Counts unaligned memory operations issued by the CPU. This event counts unal…
32 …"PublicDescription": "Counts Load-Exclusive operations that have been speculatively executed. Eg: …
36 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and …
40 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and …
44 … "PublicDescription": "Counts store-exclusive operations that have been speculatively executed."
48 …: "Counts speculatively executed load operations including Single Instruction Multiple Data (SIMD)…
[all …]
|
| H A D | tlb.json | 12 …tions can be broken up into multiple memory operations. This event does not count TLB maintenance …
20 …refills caused by memory operations from both data and instruction fetch, except for those caused …
24 …ublicDescription": "Counts level 2 TLB accesses except those caused by TLB maintenance operations."
28 …able walk are counted. This event does not count table walks caused by TLB maintenance operations."
32 …able walk are counted. This event does not count table walks caused by TLB maintenance operations."
36 …"PublicDescription": "Counts level 1 data TLB refills caused by memory read operations. If there a…
40 …on": "Counts level 1 data TLB refills caused by data side memory write operations. If there are mu…
44 …memory read operations. This event counts whether the access hits or misses in the TLB. This event…
48 …emory write operations. This event counts whether the access hits or misses in the TLB. This event…
52 …lls caused by memory read operations from both data and instruction fetch except for those caused …
[all …]
|
| H A D | l1d_cache.json | 4 …el 1 data cache refills caused by speculatively executed load or store operations that missed in t…
8 …ache accesses from any load/store operations. Atomic operations that resolve in the CPUs caches (n…
12 …and cache write-backs from snoops or cache maintenance operations. The following cache operations …
16 …ts cache line refills into the level 1 data cache from any memory read operations, that incurred a…
20 …ounts level 1 data cache accesses from any load operation. Atomic load operations that resolve in …
24 …re operations. This event also counts accesses caused by a DC ZVA (data cache zero, specified by v…
44 …cache line allocation. This event does not count evictions caused by cache maintenance operations."
48 …t of a coherency operation made by another CPU. Event count includes cache maintenance operations."
52 …sed by:\n\n- Cache Maintenance Operations (CMO) that operate by a virtual address.\n- Broadcast ca…
|
| H A D | metrics.json | 33 …"BriefDescription": "This metric measures branch operations as a percentage of operations speculat…
35 "ScaleUnit": "1percent of operations"
40 …"BriefDescription": "This metric measures crypto operations as a percentage of operations speculat…
42 "ScaleUnit": "1percent of operations"
72 …BriefDescription": "This metric measures scalar integer operations as a percentage of operations s…
74 "ScaleUnit": "1percent of operations"
205 …"BriefDescription": "This metric measures load operations as a percentage of operations speculativ…
207 "ScaleUnit": "1percent of operations"
215 …scription": "This metric measures scalar floating point operations as a percentage of operations s…
217 "ScaleUnit": "1percent of operations"
[all …]
|
| /linux/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/ |
| H A D | tlb.json | 4 …"BriefDescription": "This event counts operations that cause a TLB refill of the L1I TLB. See L1I_…
8 …"BriefDescription": "This event counts operations that cause a TLB refill of the L1D TLB. See L1D_…
12 …"BriefDescription": "This event counts operations that cause a TLB access to the L1D TLB. See L1D_…
16 …"BriefDescription": "This event counts operations that cause a TLB access to the L1I TLB. See L1I_…
20 …"BriefDescription": "This event counts operations that cause a TLB refill of the L2D TLB. See L2D_…
24 …"BriefDescription": "This event counts operations that cause a TLB access to the L2D TLB. See L2D_…
37 … "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 4KB page."
42 …"BriefDescription": "This event counts operations that cause a TLB access to the L1I in 64KB page."
47 … "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 2MB page."
52 …"BriefDescription": "This event counts operations that cause a TLB access to the L1I in 32MB page."
[all …]
|
| H A D | sve.json | 24 …"BriefDescription": "This event counts architecturally executed math function operations due to th…
28 …"BriefDescription": "This event counts architecturally executed operations due to scalar, Advanced…
36 …ent counts architecturally executed floating-point reciprocal estimate operations due to the Advan…
40 …n": "This event counts architecturally executed floating-point convert operations due to the scala…
132 …nt counts architecturally executed SIMD data-processing and load/store operations due to SVE instr…
136 …"BriefDescription": "This event counts architecturally executed operations due to MOVPRFX instruct…
148 …"BriefDescription": "This event counts architecturally executed operations due to MOVPRFX instruct…
152 …"BriefDescription": "This event counts architecturally executed operations that read from memory d…
156 …"BriefDescription": "This event counts architecturally executed operations that write to memory du…
160 …"BriefDescription": "This event counts architecturally executed prefetch operations due to scalar …
[all …]
|
| H A D | fp_operation.json | 10 …"BriefDescription": "This event counts architecturally executed NOSIMD load operations that using …
15 …"BriefDescription": "This event counts architecturally executed NOSIMD store operations that using…
195 …t counter is incremented by (128 / CSIZE) and by twice that amount for operations that would also …
199 …mber of elements for Advanced SIMD operations or by 1 for scalar operations, and by twice those am…
219 …is event counts architecturally executed Advanced SIMD data processing operations, smallest type i…
223 …is event counts architecturally executed Advanced SIMD data processing operations, smallest type i…
227 …cturally executed Advanced SIMD data processing or SVE data processing operations, smallest type i…
231 …cturally executed Advanced SIMD data processing or SVE data processing operations, smallest type i…
235 …tion": "This event counts architecturally executed SVE data processing operations, smallest type i…
239 …tion": "This event counts architecturally executed SVE data processing operations, smallest type i…
[all …]
|
| /linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/ |
| H A D | spec_operation.json | 12 "PublicDescription": "Counts operations that have been speculatively executed."
16 …operations issued by the CPU. This event counts unaligned accesses (as defined by the actual instr…
20 …"PublicDescription": "Counts unaligned memory write operations issued by the CPU. This event count…
24 …"PublicDescription": "Counts unaligned memory operations issued by the CPU. This event counts unal…
28 …"PublicDescription": "Counts Load-Exclusive operations that have been speculatively executed. Eg: …
32 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and …
36 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and …
40 … "PublicDescription": "Counts store-exclusive operations that have been speculatively executed."
44 …: "Counts speculatively executed load operations including Single Instruction Multiple Data (SIMD)…
48 … "Counts speculatively executed store operations including Single Instruction Multiple Data (SIMD)…
[all …]
|
| H A D | tlb.json | 12 …tions can be broken up into multiple memory operations. This event does not count TLB maintenance …
20 …refills caused by memory operations from both data and instruction fetch, except for those caused …
24 …ublicDescription": "Counts level 2 TLB accesses except those caused by TLB maintenance operations."
28 …able walk are counted. This event does not count table walks caused by TLB maintenance operations."
32 …able walk are counted. This event does not count table walks caused by TLB maintenance operations."
36 …"PublicDescription": "Counts level 1 data TLB refills caused by memory read operations. If there a…
40 …on": "Counts level 1 data TLB refills caused by data side memory write operations. If there are mu…
44 …memory read operations. This event counts whether the access hits or misses in the TLB. This event…
48 …emory write operations. This event counts whether the access hits or misses in the TLB. This event…
52 …lls caused by memory read operations from both data and instruction fetch except for those caused …
[all …]
|
| H A D | metrics.json | 26 …"BriefDescription": "This metric measures branch operations as a percentage of operations speculat…
28 "ScaleUnit": "1percent of operations"
33 …"BriefDescription": "This metric measures crypto operations as a percentage of operations speculat…
35 "ScaleUnit": "1percent of operations"
61 …BriefDescription": "This metric measures scalar integer operations as a percentage of operations s…
63 "ScaleUnit": "1percent of operations"
194 …"BriefDescription": "This metric measures load operations as a percentage of operations speculativ…
196 "ScaleUnit": "1percent of operations"
201 …scription": "This metric measures scalar floating point operations as a percentage of operations s…
203 "ScaleUnit": "1percent of operations"
[all …]
|
| H A D | l1d_cache.json | 4 …el 1 data cache refills caused by speculatively executed load or store operations that missed in t…
8 …ache accesses from any load/store operations. Atomic operations that resolve in the CPUs caches (n…
12 …and cache write-backs from snoops or cache maintenance operations. The following cache operations …
16 …ounts level 1 data cache accesses from any load operation. Atomic load operations that resolve in …
20 …re operations. This event also counts accesses caused by a DC ZVA (data cache zero, specified by v…
40 …cache line allocation. This event does not count evictions caused by cache maintenance operations."
44 …t of a coherency operation made by another CPU. Event count includes cache maintenance operations."
48 …sed by:\n\n- Cache Maintenance Operations (CMO) that operate by a virtual address.\n- Broadcast ca…
|
| /linux/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/ |
| H A D | uncore-hha.json | 5 "BriefDescription": "The number of all operations received by the HHA",
11 "BriefDescription": "The number of all operations received by the HHA from another socket",
17 …"BriefDescription": "The number of all operations received by the HHA from another SCCL in this so…
23 "BriefDescription": "Count of the number of operations that HHA has received from CCIX",
29 "BriefDescription": "Count of the number of WriteBackI operations that HHA has received",
35 "BriefDescription": "Count of the number of WriteBackIPtl operations that HHA has received",
40 "BriefDescription": "Count of the number of WriteThruIStash operations that HHA has received",
47 "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 64 bytes",
53 … "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
59 … "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes",
[all …]
|
| /linux/tools/memory-model/Documentation/ |
| H A D | ordering.txt | 2 operations provided by the Linux-kernel memory model (LKMM).
9 operations in decreasing order of strength:
12 all of the CPU's prior operations against some or all of its
13 subsequent operations.
15 2. Ordered memory accesses. These operations order themselves
23 some of these "unordered" operations provide limited ordering
62 o Value-returning RMW atomic operations whose names do not end in
82 Second, some RMW atomic operations provide full ordering. These
83 operations include value-returning RMW atomic operations (that is, those
86 cmpxchg(), and xchg(). Note that conditional RMW atomic operations such
[all …]
|
| /linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/ |
| H A D | instruction.json | 66 …"PublicDescription": "This event counts architecturally executed zero blocking operations due to t…
69 …"BriefDescription": "This event counts architecturally executed zero blocking operations due to th…
72 … "PublicDescription": "This event counts architecturally executed floating-point move operations.",
75 "BriefDescription": "This event counts architecturally executed floating-point move operations."
78 …"PublicDescription": "This event counts architecturally executed operations that using predicate r…
81 …"BriefDescription": "This event counts architecturally executed operations that using predicate re…
84 …cDescription": "This event counts architecturally executed inter-element manipulation operations.",
87 …efDescription": "This event counts architecturally executed inter-element manipulation operations."
90 …Description": "This event counts architecturally executed inter-register manipulation operations.",
93 …fDescription": "This event counts architecturally executed inter-register manipulation operations."
[all …]
|
| /linux/tools/perf/pmu-events/arch/arm64/ |
| H A D | common-and-microarch.json | 341 …ro-operation speculatively executed. The counter counts the number of operations executed by the …
555 "PublicDescription": "ASE operations speculatively executed",
558 "BriefDescription": "ASE operations speculatively executed"
561 "PublicDescription": "SVE operations speculatively executed",
564 "BriefDescription": "SVE operations speculatively executed"
572 "PublicDescription": "Microarchitectural operation, Operations speculatively executed.",
575 "BriefDescription": "Microarchitectural operation, Operations speculatively executed."
578 "PublicDescription": "SVE Math accelerator Operations speculatively executed.",
581 "BriefDescription": "SVE Math accelerator Operations speculatively executed."
584 "PublicDescription": "Floating-point Operations speculatively executed.",
[all …]
|
| /linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/ |
| H A D | sve.json | 4 "PublicDescription": "Counts speculatively executed operations that are SVE operations."
8 "PublicDescription": "Counts speculatively executed predicated SVE operations."
12 …"PublicDescription": "Counts speculatively executed predicated SVE operations with no active predi…
16 …"PublicDescription": "Counts speculatively executed predicated SVE operations with all predicate e…
20 …"PublicDescription": "Counts speculatively executed predicated SVE operations with at least one bu…
24 …"PublicDescription": "Counts speculatively executed predicated SVE operations with at least one no…
28 … "PublicDescription": "Counts speculatively executed SVE first fault or non-fault load operations."
32 …ion": "Counts speculatively executed SVE first fault or non-fault load operations that clear at le…
36 …"PublicDescription": "Counts speculatively executed Advanced SIMD or SVE integer operations with t…
40 …"PublicDescription": "Counts speculatively executed Advanced SIMD or SVE integer operations with t…
[all …]
|
| /linux/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/ |
| H A D | metrics.json | 75 "BriefDescription": "This metric measures advanced SIMD operations as a percentage of total operations speculatively executed.",
77 "ScaleUnit": "100percent of operations"
82 "BriefDescription": "This metric measures crypto operations as a percentage of operations speculatively executed.",
84 "ScaleUnit": "100percent of operations"
89 "BriefDescription": "Giga-floating point operations per second",
95 "BriefDescription": "This metric measures scalar integer operations as a percentage of operations speculatively executed.",
97 "ScaleUnit": "100percent of operations"
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/amdzen1/ |
| H A D | floating-point.json | 6 …operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This eve…
13 …operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This eve…
20 …operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This eve…
27 …operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This eve…
34 …operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This eve…
41 …operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This eve…
48 …operations (uOps) dispatched to each of the 4 FPU execution pipelines. This event reflects how bus…
55 …operations (uOps) dispatched to each of the 4 FPU execution pipelines. This event reflects how bus…
62 …operations (uOps) dispatched to each of the 4 FPU execution pipelines. This event reflects how bus…
69 …operations (uOps) dispatched to each of the 4 FPU execution pipelines. This event reflects how bus…
|
| /linux/Documentation/ |
| H A D | atomic_bitops.txt | 5 While our bitmap_{}() functions are non-atomic, we have a number of operations
12 The single bit operations are:
18 RMW atomic operations without return value:
23 RMW atomic operations with return value:
33 All RMW atomic operations have a '__' prefixed variant which is non-atomic.
47 The test_and_{}_bit() operations return the original value of the bit.
55 - non-RMW operations are unordered;
57 - RMW operations that have no return value are unordered;
59 - RMW operations that have a return value are fully ordered.
61 - RMW operations that are conditional are fully ordered.
[all …]
|
| /linux/tools/perf/pmu-events/arch/arm64/ampere/ampereone/ |
| H A D | metrics.json | 75 …iefDescription": "This metric measures advanced SIMD operations as a percentage of total operation…
77 "ScaleUnit": "1percent of operations"
82 …"BriefDescription": "This metric measures crypto operations as a percentage of operations speculat…
84 "ScaleUnit": "1percent of operations"
89 "BriefDescription": "Giga-floating point operations per second",
95 …BriefDescription": "This metric measures scalar integer operations as a percentage of operations s…
97 "ScaleUnit": "1percent of operations"
109 …"BriefDescription": "This metric measures load operations as a percentage of operations speculativ…
111 "ScaleUnit": "1percent of operations"
118 "ScaleUnit": "1percent of operations"
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/westmereex/ |
| H A D | floating-point.json | 86 "BriefDescription": "Computational floating-point operations executed",
118 "BriefDescription": "128 bit SIMD integer pack operations",
126 "BriefDescription": "128 bit SIMD integer arithmetic operations",
134 "BriefDescription": "128 bit SIMD integer logical operations",
142 "BriefDescription": "128 bit SIMD integer multiply operations",
150 "BriefDescription": "128 bit SIMD integer shift operations",
158 "BriefDescription": "128 bit SIMD integer shuffle/move operations",
166 "BriefDescription": "128 bit SIMD integer unpack operations",
174 "BriefDescription": "SIMD integer 64 bit pack operations",
182 "BriefDescription": "SIMD integer 64 bit arithmetic operations",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/westmereep-dp/ |
| H A D | floating-point.json | 86 "BriefDescription": "Computational floating-point operations executed",
118 "BriefDescription": "128 bit SIMD integer pack operations",
126 "BriefDescription": "128 bit SIMD integer arithmetic operations",
134 "BriefDescription": "128 bit SIMD integer logical operations",
142 "BriefDescription": "128 bit SIMD integer multiply operations",
150 "BriefDescription": "128 bit SIMD integer shift operations",
158 "BriefDescription": "128 bit SIMD integer shuffle/move operations",
166 "BriefDescription": "128 bit SIMD integer unpack operations",
174 "BriefDescription": "SIMD integer 64 bit pack operations",
182 "BriefDescription": "SIMD integer 64 bit arithmetic operations",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/nehalemep/ |
| H A D | floating-point.json | 86 "BriefDescription": "Computational floating-point operations executed",
118 "BriefDescription": "128 bit SIMD integer pack operations",
126 "BriefDescription": "128 bit SIMD integer arithmetic operations",
134 "BriefDescription": "128 bit SIMD integer logical operations",
142 "BriefDescription": "128 bit SIMD integer multiply operations",
150 "BriefDescription": "128 bit SIMD integer shift operations",
158 "BriefDescription": "128 bit SIMD integer shuffle/move operations",
166 "BriefDescription": "128 bit SIMD integer unpack operations",
174 "BriefDescription": "SIMD integer 64 bit pack operations",
182 "BriefDescription": "SIMD integer 64 bit arithmetic operations",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/nehalemex/ |
| H A D | floating-point.json | 86 "BriefDescription": "Computational floating-point operations executed",
118 "BriefDescription": "128 bit SIMD integer pack operations",
126 "BriefDescription": "128 bit SIMD integer arithmetic operations",
134 "BriefDescription": "128 bit SIMD integer logical operations",
142 "BriefDescription": "128 bit SIMD integer multiply operations",
150 "BriefDescription": "128 bit SIMD integer shift operations",
158 "BriefDescription": "128 bit SIMD integer shuffle/move operations",
166 "BriefDescription": "128 bit SIMD integer unpack operations",
174 "BriefDescription": "SIMD integer 64 bit pack operations",
182 "BriefDescription": "SIMD integer 64 bit arithmetic operations",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/westmereep-sp/ |
| H A D | floating-point.json | 86 "BriefDescription": "Computational floating-point operations executed",
118 "BriefDescription": "128 bit SIMD integer pack operations",
126 "BriefDescription": "128 bit SIMD integer arithmetic operations",
134 "BriefDescription": "128 bit SIMD integer logical operations",
142 "BriefDescription": "128 bit SIMD integer multiply operations",
150 "BriefDescription": "128 bit SIMD integer shift operations",
158 "BriefDescription": "128 bit SIMD integer shuffle/move operations",
166 "BriefDescription": "128 bit SIMD integer unpack operations",
174 "BriefDescription": "SIMD integer 64 bit pack operations",
182 "BriefDescription": "SIMD integer 64 bit arithmetic operations",
[all …]
|