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/linux/arch/arm64/kernel/probes/
H A Dsimulate-insn.c68 static bool __kprobes check_cbz(u32 opcode, struct pt_regs *regs) in check_cbz() argument
70 int xn = opcode & 0x1f; in check_cbz()
72 return (opcode & (1 << 31)) ? in check_cbz()
76 static bool __kprobes check_cbnz(u32 opcode, struct pt_regs *regs) in check_cbnz() argument
78 int xn = opcode & 0x1f; in check_cbnz()
80 return (opcode & (1 << 31)) ? in check_cbnz()
84 static bool __kprobes check_tbz(u32 opcode, struct pt_regs *regs) in check_tbz() argument
86 int xn = opcode & 0x1f; in check_tbz()
87 int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f); in check_tbz()
92 static bool __kprobes check_tbnz(u32 opcode, struct pt_regs *regs) in check_tbnz() argument
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H A Dsimulate-insn.h11 void simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs);
12 void simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs);
13 void simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs);
14 void simulate_br_blr(u32 opcode, long addr, struct pt_regs *regs);
15 void simulate_ret(u32 opcode, long addr, struct pt_regs *regs);
16 void simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs);
17 void simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs);
18 void simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs);
19 void simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs);
20 void simulate_nop(u32 opcode, long addr, struct pt_regs *regs);
/linux/arch/csky/kernel/probes/
H A Dsimulate-insn.c69 simulate_br16(u32 opcode, long addr, struct pt_regs *regs) in simulate_br16() argument
72 addr + sign_extend32((opcode & 0x3ff) << 1, 9)); in simulate_br16()
76 simulate_br32(u32 opcode, long addr, struct pt_regs *regs) in simulate_br32() argument
79 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_br32()
83 simulate_bt16(u32 opcode, long addr, struct pt_regs *regs) in simulate_bt16() argument
87 addr + sign_extend32((opcode & 0x3ff) << 1, 9)); in simulate_bt16()
93 simulate_bt32(u32 opcode, long addr, struct pt_regs *regs) in simulate_bt32() argument
97 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bt32()
103 simulate_bf16(u32 opcode, long addr, struct pt_regs *regs) in simulate_bf16() argument
107 addr + sign_extend32((opcode & 0x3ff) << 1, 9)); in simulate_bf16()
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/linux/arch/arm/nwfpe/
H A Dfpa11_cpdt.c212 unsigned int PerformLDF(const unsigned int opcode) in PerformLDF() argument
215 unsigned int nRc = 1, write_back = WRITE_BACK(opcode); in PerformLDF()
217 pBase = (unsigned int __user *) readRegister(getRn(opcode)); in PerformLDF()
218 if (REG_PC == getRn(opcode)) { in PerformLDF()
224 if (BIT_UP_SET(opcode)) in PerformLDF()
225 pFinal += getOffset(opcode); in PerformLDF()
227 pFinal -= getOffset(opcode); in PerformLDF()
229 if (PREINDEXED(opcode)) in PerformLDF()
234 switch (opcode & MASK_TRANSFER_LENGTH) { in PerformLDF()
236 loadSingle(getFd(opcode), pAddress); in PerformLDF()
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H A Dfpopcode.h57 abcd arithmetic opcode (TABLES 3 & 4)
179 #define MASK_CPDT 0x0c000000 /* data processing opcode */
191 /* Get the coprocessor number from the opcode. */
192 #define getCoprocessorNumber(opcode) ((opcode & MASK_COPROCESSOR) >> 8) argument
194 /* Get the offset from the opcode. */
195 #define getOffset(opcode) (opcode & MASK_OFFSET) argument
198 #define TEST_OPCODE(opcode,mask) (((opcode) & (mask)) == (mask)) argument
200 #define LOAD_OP(opcode) TEST_OPCODE((opcode),MASK_CPDT | BIT_LOAD) argument
201 #define STORE_OP(opcode) ((opcode & (MASK_CPDT | BIT_LOAD)) == MASK_CPDT) argument
203 #define LDF_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument
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H A Dfpa11_cprt.c18 unsigned int PerformFLT(const unsigned int opcode);
19 unsigned int PerformFIX(const unsigned int opcode);
21 static unsigned int PerformComparison(const unsigned int opcode);
23 unsigned int EmulateCPRT(const unsigned int opcode) in EmulateCPRT() argument
26 if (opcode & 0x800000) { in EmulateCPRT()
31 return PerformComparison(opcode); in EmulateCPRT()
35 switch ((opcode & 0x700000) >> 20) { in EmulateCPRT()
37 return PerformFLT(opcode); in EmulateCPRT()
40 return PerformFIX(opcode); in EmulateCPRT()
44 writeFPSR(readRegister(getRd(opcode))); in EmulateCPRT()
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H A Dfpa11_cpdo.c14 unsigned int SingleCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd);
15 unsigned int DoubleCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd);
16 unsigned int ExtendedCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd);
18 unsigned int EmulateCPDO(const unsigned int opcode) in EmulateCPDO() argument
27 nDest = getDestinationSize(opcode); in EmulateCPDO()
31 roundData.mode = SetRoundingMode(opcode); in EmulateCPDO()
32 roundData.precision = SetRoundingPrecision(opcode); in EmulateCPDO()
40 if (MONADIC_INSTRUCTION(opcode)) in EmulateCPDO()
43 nType = fpa11->fType[getFn(opcode)]; in EmulateCPDO()
45 if (!CONSTANT_FM(opcode)) { in EmulateCPDO()
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H A Dfpa11.c35 int8 SetRoundingMode(const unsigned int opcode) in SetRoundingMode() argument
37 switch (opcode & MASK_ROUNDING_MODE) { in SetRoundingMode()
53 int8 SetRoundingPrecision(const unsigned int opcode) in SetRoundingPrecision() argument
56 switch (opcode & MASK_ROUNDING_PRECISION) { in SetRoundingPrecision()
84 /* Emulate the instruction in the opcode. */
85 unsigned int EmulateAll(unsigned int opcode) in EmulateAll() argument
90 printk("NWFPE: emulating opcode %08x\n", opcode); in EmulateAll()
92 code = opcode & 0x00000f00; in EmulateAll()
95 code = opcode & 0x0e000000; in EmulateAll()
97 if (opcode & 0x00000010) { in EmulateAll()
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/linux/include/trace/events/
H A Dspmi.h16 TP_PROTO(u8 opcode, u8 sid, u16 addr, u8 len, const u8 *buf),
17 TP_ARGS(opcode, sid, addr, len, buf),
20 __field ( u8, opcode )
28 __entry->opcode = opcode;
36 (int)__entry->opcode, (int)__entry->sid,
42 TP_PROTO(u8 opcode, u8 sid, u16 addr, int ret),
43 TP_ARGS(opcode, sid, addr, ret),
46 __field ( u8, opcode )
53 __entry->opcode = opcode;
60 (int)__entry->opcode, (int)__entry->sid,
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/linux/arch/powerpc/xmon/
H A Dppc.h1 /* ppc.h -- Header file for PowerPC opcode table
30 /* The opcode table is an array of struct powerpc_opcode. */
34 /* The opcode name. */
37 /* The opcode itself. Those bits which will be filled in with
39 unsigned long opcode; member
41 /* The opcode mask. This is used by the disassembler. This is a
43 opcode field, and zeroes indicating those bits which need not
47 /* One bit flags for the opcode. These are used to indicate which
52 /* One bit flags for the opcode. These are used to indicate which
63 /* The table itself is sorted by major opcode number, and is otherwise
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H A Dppc-dis.c77 /* Find a match for INSN in the opcode table, given machine DIALECT.
78 A DIALECT of -1 is special, matching all machine opcode variations. */
83 const struct powerpc_opcode *opcode; in lookup_powerpc() local
87 /* Find the first match in the opcode table for this major opcode. */ in lookup_powerpc()
88 for (opcode = powerpc_opcodes; opcode < opcode_end; ++opcode) in lookup_powerpc()
94 if ((insn & opcode->mask) != opcode->opcode in lookup_powerpc()
96 && ((opcode->flags & dialect) == 0 in lookup_powerpc()
97 || (opcode->deprecated & dialect) != 0))) in lookup_powerpc()
102 for (opindex = opcode->operands; *opindex != 0; opindex++) in lookup_powerpc()
111 return opcode; in lookup_powerpc()
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/linux/arch/riscv/kernel/probes/
H A Dsimulate-insn.c36 bool __kprobes simulate_jal(u32 opcode, unsigned long addr, struct pt_regs *regs) in simulate_jal() argument
40 * imm [20] | imm[10:1] | imm[11] | imm[19:12] | rd | opcode in simulate_jal()
45 u32 index = RV_EXTRACT_RD_REG(opcode); in simulate_jal()
51 imm = RV_EXTRACT_JTYPE_IMM(opcode); in simulate_jal()
58 bool __kprobes simulate_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs) in simulate_jalr() argument
62 * offset[11:0] | rs1 | 010 | rd | opcode in simulate_jalr()
67 u32 imm = RV_EXTRACT_ITYPE_IMM(opcode); in simulate_jalr()
68 u32 rd_index = RV_EXTRACT_RD_REG(opcode); in simulate_jalr()
69 u32 rs1_index = RV_EXTRACT_RS1_REG(opcode); in simulate_jalr()
84 bool __kprobes simulate_auipc(u32 opcode, unsigned long addr, struct pt_regs *regs) in simulate_auipc() argument
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/linux/tools/perf/scripts/python/
H A Dpowerpc-hcalls.py20 # opcode: {
31 # opcode: nsec
153 def hcall_table_lookup(opcode): argument
154 if (opcode in hcall_table):
155 return hcall_table[opcode]
157 return opcode
164 for opcode in output:
165 h_name = hcall_table_lookup(opcode)
166 time = output[opcode]['time']
167 cnt = output[opcode]['cnt']
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/linux/arch/riscv/include/asm/
H A Dinsn-def.h32 .macro insn_r, opcode, func3, func7, rd, rs1, rs2
33 .insn r \opcode, \func3, \func7, \rd, \rs1, \rs2
36 .macro insn_i, opcode, func3, rd, rs1, simm12
37 .insn i \opcode, \func3, \rd, \rs1, \simm12
40 .macro insn_s, opcode, func3, rs2, simm12, rs1
41 .insn s \opcode, \func3, \rs2, \simm12(\rs1)
48 .macro insn_r, opcode, func3, func7, rd, rs1, rs2
49 .4byte ((\opcode << INSN_R_OPCODE_SHIFT) | \
57 .macro insn_i, opcode, func3, rd, rs1, simm12
58 .4byte ((\opcode << INSN_I_OPCODE_SHIFT) | \
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/linux/arch/x86/tools/
H A Dgen-insn-attr-x86.awk6 # Usage: awk -f gen-insn-attr-x86.awk x86-opcode-map.txt > inat-tables.c
38 print "/* x86 opcode map generated from x86-opcode-map.txt */"
144 # escape opcode table
155 # AVX/escape opcode table
160 if (tname == "") # AVX only opcode table
163 if (aid == -1 && eid == -1) # primary opcode table
169 # XOP opcode table
174 if (tname == "") # XOP only opcode table
177 if (xopid == -1 && eid == -1) # primary opcode table
299 # check if escaped opcode
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/linux/tools/arch/x86/tools/
H A Dgen-insn-attr-x86.awk6 # Usage: awk -f gen-insn-attr-x86.awk x86-opcode-map.txt > inat-tables.c
38 print "/* x86 opcode map generated from x86-opcode-map.txt */"
144 # escape opcode table
155 # AVX/escape opcode table
160 if (tname == "") # AVX only opcode table
163 if (aid == -1 && eid == -1) # primary opcode table
169 # XOP opcode table
174 if (tname == "") # XOP only opcode table
177 if (xopid == -1 && eid == -1) # primary opcode table
299 # check if escaped opcode
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/linux/drivers/infiniband/sw/rxe/
H A Drxe_req.c14 u32 opcode);
25 qp->req.opcode = next_opcode(qp, wqe, in retry_first_write_send()
26 wqe->wr.opcode); in retry_first_write_send()
53 qp->req.opcode = -1; in req_retry()
58 mask = wr_opcode_mask(wqe->wr.opcode, qp); in req_retry()
193 wqe->mask = wr_opcode_mask(wqe->wr.opcode, qp); in req_next_wqe()
211 if (wqe->wr.opcode == IB_WR_LOCAL_INV) in rxe_wqe_is_fenced()
223 static int next_opcode_rc(struct rxe_qp *qp, u32 opcode, int fits) in next_opcode_rc() argument
225 switch (opcode) { in next_opcode_rc()
227 if (qp->req.opcode == IB_OPCODE_RC_RDMA_WRITE_FIRST || in next_opcode_rc()
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/linux/arch/x86/mm/
H A Dpf_in.c103 static int get_opcode(unsigned char *addr, unsigned int *opcode) in get_opcode() argument
109 *opcode = *(unsigned short *)addr; in get_opcode()
112 *opcode = *addr; in get_opcode()
119 #define CHECK_OP_TYPE(opcode, array, type) \ argument
121 if (array[i] == opcode) { \
129 unsigned int opcode; in get_ins_type() local
137 p += get_opcode(p, &opcode); in get_ins_type()
139 CHECK_OP_TYPE(opcode, reg_rop, REG_READ); in get_ins_type()
140 CHECK_OP_TYPE(opcode, reg_wop, REG_WRITE); in get_ins_type()
141 CHECK_OP_TYPE(opcode, imm_wop, IMM_WRITE); in get_ins_type()
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/linux/arch/s390/tools/
H A Dgen_opcode_table.c3 * Generate opcode table initializers for the in-kernel disassembler.
24 char opcode[STRING_SIZE_MAX]; member
35 char opcode[2]; member
51 * Table of instruction format types. Each opcode is defined with at
56 * of an opcode can be found. The mask member is the and-mask that
58 * fourth) nibble of the opcode.
60 * Principles of Operation) which have the same position of the opcode
64 * the (only) byte that contains the opcode.
158 rc = scanf("%s %s %s", insn.opcode, insn.name, insn.format); in read_instructions()
246 char *opcode; in print_opcode() local
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/linux/drivers/acpi/acpica/
H A Dpsopinfo.c4 * Module Name: psopinfo - AML opcode information functions and dispatch tables
26 * PARAMETERS: opcode - The AML opcode
28 * RETURN: A pointer to the info about the opcode.
30 * DESCRIPTION: Find AML opcode description based on the opcode.
35 const struct acpi_opcode_info *acpi_ps_get_opcode_info(u16 opcode) in acpi_ps_get_opcode_info() argument
38 const char *opcode_name = "Unknown AML opcode"; in acpi_ps_get_opcode_info()
44 * Detect normal 8-bit opcode or extended 16-bit opcode in acpi_ps_get_opcode_info()
46 if (!(opcode & 0xFF00)) { in acpi_ps_get_opcode_info()
48 /* Simple (8-bit) opcode: 0-255, can't index beyond table */ in acpi_ps_get_opcode_info()
51 [acpi_gbl_short_op_index[(u8)opcode]]); in acpi_ps_get_opcode_info()
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/linux/Documentation/firmware-guide/acpi/
H A Dmethod-tracing.rst82 method, or an AML opcode. Note that the format of the log entries are
86 [ 0.186630] exdebug-0398 ex_trace_point : Opcode Begin [0xf5905c88:If] execution.
87 [ 0.186820] exdebug-0398 ex_trace_point : Opcode Begin [0xf5905cc0:LEqual] execution.
88 …[ 0.187010] exdebug-0398 ex_trace_point : Opcode Begin [0xf5905a20:-NamePath-] executi…
89 …[ 0.187214] exdebug-0398 ex_trace_point : Opcode End [0xf5905a20:-NamePath-] execution.
90 [ 0.187407] exdebug-0398 ex_trace_point : Opcode Begin [0xf5905f60:One] execution.
91 [ 0.187594] exdebug-0398 ex_trace_point : Opcode End [0xf5905f60:One] execution.
92 [ 0.187789] exdebug-0398 ex_trace_point : Opcode End [0xf5905cc0:LEqual] execution.
93 [ 0.187980] exdebug-0398 ex_trace_point : Opcode Begin [0xf5905cc0:Return] execution.
94 [ 0.188146] exdebug-0398 ex_trace_point : Opcode Begin [0xf5905f60:One] execution.
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/linux/arch/sh/kernel/
H A Dkprobes.c42 kprobe_opcode_t opcode = *p->addr; in arch_prepare_kprobe() local
44 if (OPCODE_RTE(opcode)) in arch_prepare_kprobe()
48 p->opcode = opcode; in arch_prepare_kprobe()
62 *p->addr = p->opcode; in arch_disarm_kprobe()
104 saved->opcode = 0; in arch_remove_kprobe()
111 saved->opcode = 0; in arch_remove_kprobe()
151 if (OPCODE_JSR(p->opcode) || OPCODE_JMP(p->opcode)) { in prepare_singlestep()
152 unsigned int reg_nr = ((p->opcode >> 8) & 0x000F); in prepare_singlestep()
154 } else if (OPCODE_BRA(p->opcode) || OPCODE_BSR(p->opcode)) { in prepare_singlestep()
155 unsigned long disp = (p->opcode & 0x0FFF); in prepare_singlestep()
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/linux/arch/x86/include/asm/
H A Dtext-patching.h16 extern void text_poke_early(void *addr, const void *opcode, size_t len);
34 extern void *text_poke(void *addr, const void *opcode, size_t len);
36 extern void *text_poke_kgdb(void *addr, const void *opcode, size_t len);
37 extern void *text_poke_copy(void *addr, const void *opcode, size_t len);
39 extern void *text_poke_copy_locked(void *addr, const void *opcode, size_t len, bool core_ok);
42 extern void smp_text_poke_single(void *addr, const void *opcode, size_t len, const void *emulate);
44 extern void smp_text_poke_batch_add(void *addr, const void *opcode, size_t len, const void *emulate…
64 static __always_inline int text_opcode_size(u8 opcode) in text_opcode_size() argument
71 switch(opcode) { in text_opcode_size()
87 u8 opcode; member
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/linux/drivers/infiniband/sw/rdmavt/
H A Dtrace_tx.h17 #define wr_opcode_name(opcode) { IB_WR_##opcode, #opcode } argument
18 #define show_wr_opcode(opcode) \ argument
19 __print_symbolic(opcode, \
45 "[%s] wqe %p wr_id %llx send_flags %x qpn %x qpt %u psn %x lpsn %x ssn %x length %u opcode 0x%.2x,%…
60 __field(u32, opcode)
80 __entry->opcode = wqe->wr.opcode;
103 __entry->opcode, show_wr_opcode(__entry->opcode),
127 __field(enum ib_wr_opcode, opcode)
139 __entry->opcode = wqe->wr.opcode;
143 "[%s] qpn 0x%x qpt %u wqe %p idx %u wr_id %llx length %u ssn %u opcode %x send_flags %x",
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/linux/arch/loongarch/include/asm/
H A Dinst.h267 unsigned int opcode : 17; member
273 unsigned int opcode : 6; member
279 unsigned int opcode : 7; member
286 unsigned int opcode : 6; member
292 unsigned int opcode : 22; member
299 unsigned int opcode : 17; member
306 unsigned int opcode : 16; member
313 unsigned int opcode : 10; member
320 unsigned int opcode : 8; member
327 unsigned int opcode : 6; member
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