| /freebsd/sys/contrib/device-tree/Bindings/timer/ |
| H A D | xlnx,xps-timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/timer/xlnx,xps-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx LogiCORE IP AXI Timer
10 - Sean Anderson <sean.anderson@seco.com>
15 const: xlnx,xps-timer-1.00.a
20 clock-names:
29 '#pwm-cells': true
31 xlnx,count-width:
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| H A D | arm,sp804.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,sp804.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haojian Zhuang <haojian.zhuang@linaro.org>
14 16 or 32 bit operation and capable of running in one-shot, periodic, or
15 free-running mode. The input clock is shared, but can be gated and prescaled
16 independently for each timer.
18 There is a viriant of Arm SP804: Hisilicon 64-bit SP804 timer. Some Hisilicon
27 - arm,sp804
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| H A D | nvidia,tegra-timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra timer
10 - Stephen Warren <swarren@nvidia.com>
13 - if:
17 const: nvidia,tegra210-timer
25 A list of 14 interrupts; one per each timer channels 0 through 13
27 - if:
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| H A D | samsung,exynos4210-mct.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC Multi Core Timer (MCT)
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
14 global timer and CPU local timers. The global timer is a 64-bit free running
15 up-counter and can generate 4 interrupts when the counter reaches one of the
16 four preset counter values. The CPU local timers are 32-bit free running
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| H A D | nvidia,tegra186-timer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/nvidia,tegra186-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 timer
10 - Thierry Reding <treding@nvidia.com>
13 The Tegra timer provides 29-bit timer counters and a 32-bit timestamp
14 counter. Each NV timer selects its timing reference signal from the 1 MHz
16 programmed to generate one-shot, periodic, or watchdog interrupts.
22 - const: nvidia,tegra186-timer
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| H A D | renesas,8bit-timer.txt | 1 * Renesas H8/300 8bit timer
3 The 8bit timer is a 8bit timer/counter with configurable clock inputs and
6 This implement only supported cascade mode.
10 - compatible: must contain "renesas,8bit-timer"
11 - reg: base address and length of the registers block for the timer module.
12 - interrupts: interrupt-specifier for the timer, CMIA and TOVI
13 - clocks: a list of phandle, one for each entry in clock-names.
14 - clock-names: must contain "fck" for the functional clock.
18 timer8_0: timer@ffff80 {
19 compatible = "renesas,8bit-timer";
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| H A D | brcm,kona-timer.txt | 1 Broadcom Kona Family timer
2 -----------------------------------------------------
3 This timer is used in the following Broadcom SoCs:
7 - compatible : "brcm,kona-timer"
8 - DEPRECATED: compatible : "bcm,kona-timer"
9 - reg : Register range for the timer
10 - interrupts : interrupt for the timer
11 - clocks: phandle + clock specifier pair of the external clock
12 - clock-frequency: frequency that the clock operates
14 Only one of clocks or clock-frequency should be specified.
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| H A D | riscv,timer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/riscv,timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V timer
10 - Anup Patel <anup@brainfault.org>
13 RISC-V platforms always have a RISC-V timer device for the supervisor-mode
14 based on the time CSR defined by the RISC-V privileged specification. The
15 timer interrupts of this device are configured using the RISC-V SBI Time
16 extension or the RISC-V Sstc extension.
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| H A D | arm,armv7m-systick.txt | 1 * ARMv7M System Timer
3 ARMv7-M includes a system timer, known as SysTick. Current driver only
7 - compatible : Should be "arm,armv7m-systick"
8 - reg : The address range of the timer
10 Required clocking property, have to be one of:
11 - clocks : The input clock of the timer
12 - clock-frequency : The rate in HZ in input of the ARM SysTick
16 systick: timer@e000e010 {
17 compatible = "arm,armv7m-systick";
22 systick: timer@e000e010 {
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| H A D | cdns,ttc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/cdns,ttc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence TTC - Triple Timer Counter
10 - Michal Simek <michal.simek@amd.com>
22 A list of 3 interrupts; one per timer channel.
27 power-domains:
30 timer-width:
33 Bit width of the timer, necessary if not 16.
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| H A D | ingenic,sysost.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/ingenic,sysost.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
13 The SYSOST in an Ingenic SoC provides one 64bit timer for clocksource
14 and one or more 32bit timers for clockevent.
17 "#clock-cells":
22 - ingenic,x1000-ost
23 - ingenic,x2000-ost
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| /freebsd/contrib/libbegemot/ |
| H A D | rpoll.man | 2 '\" Copyright (c)1996-2006 by Hartmut Brandt
33 rpoll - callback functions for file descriptors and timers
60 Typically in these programs one of
65 These calls are however clumsy to use and the usage of one of these calls is
66 probably not portable to other systems - not all systems support both calls.
78 Each event on a file descriptor or each timer event is translated into a call to a user
103 returns a handle, which may be used later to de-register the file descriptor.
114 A registered file descriptor may be de-registered by calling
119 A timer is created with
130 after which the timer event will be generated.
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| /freebsd/share/man/man9/ |
| H A D | eventtimers.9 | 2 .\" Copyright (c) 2011-2013 Alexander Motin <mav@FreeBSD.org>
33 .Bd -literal
87 or periodically, to run different time-based events.
89 .Bl -tag -width "Consumers"
103 provide APIs for event timer drivers and consumers.
110 .Bl -tag -width Va
112 Unique name of the event timer for management purposes.
114 Set of flags, describing timer capabilities:
115 .Bl -tag -width "ET_FLAGS_PERIODIC" -compact
119 One-shot mode supported.
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| H A D | callout.9 | 60 .Bd -literal
182 Callouts only provide a single-shot mode.
183 If a consumer requires a periodic timer,
210 .Dq multi-processor safe ;
239 A sleepable read-mostly lock
261 .Bl -tag -width ".Dv CALLOUT_RETURNUNLOCKED"
267 The lock is only acquired in read mode when running the callout handler.
279 returns a value of one.
282 negative one is returned.
320 These functions return a value of one if a pending callout was cancelled
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| /freebsd/share/man/man4/ |
| H A D | eventtimers.4 | 32 Kernel uses several types of time-related devices, such as: real time clocks,
39 periodically, to run different time-based events.
42 Kernel uses time-based events for many different purposes: scheduling,
47 .Bl -tag -width ".Fn hardclock"
63 Different platforms provide different kinds of timer hardware.
65 that hardware, and to use it, supplying kernel with all required time-based
72 .Bd -literal
89 .Bl -inset
92 bitmask, defining event timer capabilities:
93 .Bl -tag -offset indent -width indent -compact
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| H A D | attimer.4 | 30 .Nd i8254 Programmable Interval Timer (AT Timer) driver
36 .Bl -ohang
38 controls support for the event timer functionality.
53 The same value is also available at run-time via the
58 This driver uses i8254 Programmable Interval Timer (AT Timer) hardware
59 to supply the kernel with one timecounter and one event timer, and to generate
63 platform-dependent frequency.
65 one-shot.
66 The output of each channel has platform-defined wiring: one channel is wired
67 to the interrupt controller and may be used as event timer, one channel is
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| H A D | termios.4 | 72 a complex command (a command composed of one or more related
143 most one session.
183 unless one of the
190 returns -1 with
206 signal unless one of the following special cases apply: if
224 returns -1 with
238 full-duplex mode, so that data may arrive even while output is occurring.
271 This is useful for terminals that can operate in full-duplex mode.
290 blocking, in one of three ways:
291 .Bl -enum -offset indent
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | atmel-tcb.txt | 1 * Device tree bindings for Atmel Timer Counter Blocks
2 - compatible: Should be "atmel,<chip>-tcb", "simple-mfd", "syscon".
4 - reg: Should contain registers location and length
5 - #address-cells: has to be 1
6 - #size-cells: has to be 0
7 - interrupts: Should contain all interrupts for the TC block
9 block has one interrupt per channel.
10 - clock-names: tuple listing input clock names.
13 - clocks: phandles to input clocks.
16 * a timer
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| /freebsd/sys/contrib/device-tree/Bindings/soc/microchip/ |
| H A D | atmel,at91rm9200-tcb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Atmel Timer Counter Block
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each
14 timer has three channels with two counters each.
19 - enum:
20 - atmel,at91rm9200-tcb
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| /freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | mpic-timer.txt | 4 - compatible: "fsl,mpic-global-timer"
6 - reg : Contains two regions. The first is the main timer register bank
7 (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx). The second is the timer control
10 - fsl,available-ranges: use <start count> style section to define which
11 timer interrupts can be used. This property is optional; without this,
14 - interrupts: one interrupt per timer in the group, in order, starting
15 with timer zero. If timer-available-ranges is present, only the
19 /* Note that this requires #interrupt-cells to be 4 */
20 timer0: timer@41100 {
21 compatible = "fsl,mpic-global-timer";
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| /freebsd/sys/contrib/device-tree/Bindings/watchdog/ |
| H A D | digicolor-wdt.txt | 1 Conexant Digicolor SoCs Watchdog timer
5 timer counters. The first timer (called "Timer A") is the only one that can be
10 - compatible : Should be "cnxt,cx92755-wdt"
11 - reg : Specifies base physical address and size of the registers
12 - clocks : phandle; specifies the clock that drives the timer
16 - timeout-sec : Contains the watchdog timeout in seconds
21 compatible = "cnxt,cx92755-wdt";
24 timeout-sec = <15>;
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| /freebsd/contrib/llvm-project/lldb/source/Commands/ |
| H A D | CommandObjectLog.cpp | 1 //===-- CommandObjectLog.cpp ----------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
22 #include "lldb/Utility/Timer.h"
60 // Define the first (and only) variant of this arg. in CommandObjectLogEnable()
64 // There is only one variant this argument could be; put it into the in CommandObjectLogEnable()
168 "%s takes a log channel and one or more log types.\n", in DoExecute()
176 "the circular buffer handler requires a non-zero buffer size.\n"); in DoExecute()
183 result.AppendError("a buffer size can only be specified for the circular " in DoExecute()
190 "a file name can only be specified for the stream handler.\n"); in DoExecute()
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | PassTimingInfo.cpp | 1 //===- PassTimingInfo.cpp - LLVM Pass Timing Implementation --------
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| /freebsd/contrib/ntp/libntp/lib/isc/include/isc/ |
| H A D | timer.h | 2 * Copyright (C) 2004-2009 Internet Systems Consortium, Inc. ("ISC")
3 * Copyright (C) 1998-2002 Internet Software Consortium.
18 /* $Id: timer.h,v 1.43 2009/09/02 23:48:03 tbox Exp $ */
27 /*! \file isc/timer.h
37 * 'one-shot' timers.
44 * Timers can change type. It is typical to create a timer as
45 * an 'inactive' timer and then change it into a 'ticker' or
46 * 'once' timer.
51 * Clients of this module must not be holding a timer's task's lock when
52 * making a call that affects that timer. Failure to follow this rule
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| /freebsd/contrib/ntp/scripts/deprecated/ |
| H A D | freq_adj.in | 1 #! @PATH_PERL@ -w
10 #chop($ncpu = `sysctl -n hw.ncpu`);
11 #die "Found $ncpu CPUs; can only be run on systems with 1 CPU.\n" if ($ncpu > 1);
16 chop($timer = `sysctl -n kern.timecounter.hardware 2> /dev/null`);
18 $timer =~ tr/\U/\L/;
20 if ($timer eq '') {
25 $timer = $1;
32 $opt_t = $timer if !defined($opt_t);
34 if ($timer ne '') { # $timer found...
35 if ($opt_t ne '') { # - and $opt_t found
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