one\-time\-programmable (full) in projects: linux

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Searched +full:one +full:- +full:time +full:- +full:programmable (Results 1 – 25 of 156) sorted by relevance

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/linux/Documentation/driver-api/
H A D	ptp.rst	`1 .. SPDX-License-Identifier: GPL-2.0 18 - Set time 19 - Get time 20 - Shift the clock by a given offset atomically 21 - Adjust clock frequency 24 - Time stamp external events 25 - Period output signals configurable from user space 26 - Low Pass Filter (LPF) access from user space 27 - Synchronization of the Linux system time via the PPS subsystem 36 driver of asynchronous events (alarms and external time stamps) via [all …]`
/linux/Documentation/devicetree/bindings/iio/dac/
H A D	adi,ad5758.yaml	`1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Michael Hennerich <Michael.Hennerich@analog.com> 19 spi-cpha: true 21 adi,dc-dc-mode: 25 Mode of operation of the dc-to-dc converter 31 Programmable Power Control (PPC) 32 In this mode, the VDPC+ voltage is user-programmable to a fixed level 36 voltage output at the VIOUT pin. Only one mode can be enabled at [all …]`
/linux/drivers/mtd/chips/
H A D	Kconfig	1 # SPDX-License-Identifier: GPL-2.0-only 13 support any device that is CFI-compliant, you need to enable this 18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips" 22 This option enables JEDEC-style probing of flash chips which are not 24 CFI-targeted flash drivers for any chips which are identified which 26 covers most AMD/Fujitsu-compatible chips and also non-CFI 53 are expected to be wired to the CPU in 'host-endian' form. 85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY 92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY 99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY [all …]
/linux/Documentation/devicetree/bindings/leds/
H A D	leds-lm3532.txt	1 * Texas Instruments - lm3532 White LED driver with ambient light sensing 4 The LM3532 provides the 3 high-voltage, low-side current sinks. The device is 5 programmable over an I2C-compatible interface and has independent 11 each with 32 internal voltage setting resistors, 8-bit logarithmic and linear 13 1000:1 dimming ratio with programmable fade in and fade out settings. 16 - compatible : "ti,lm3532" 17 - reg : I2C slave address 18 - #address-cells : 1 19 - #size-cells : 0 22 - enable-gpios : gpio pin to enable (active high)/disable the device. [all …]
/linux/include/linux/
H A D	pruss_driver.h	1 /* SPDX-License-Identifier: GPL-2.0-only / 3 PRU-ICSS sub-system specific definitions 5 * Copyright (C) 2014-2020 Texas Instruments Incorporated - http://www.ti.com/ 6 * Suman Anna <s-anna@ti.com> 18 * enum pruss_gp_mux_sel - PRUSS GPI/O Mux modes for the 23 * values are interchanged. Also, this bit-field does not exist on 36 * enum pruss_gpi_mode - PRUSS GPI configuration modes, used 48 * enum pru_type - PRU core type identifier 50 * @PRU_TYPE_PRU: Programmable Real-time Unit 51 * @PRU_TYPE_RTU: Auxiliary Programmable Real-Time Unit [all …]
/linux/Documentation/hwmon/
H A D	lm78.rst	6 * National Semiconductor LM78 / LM78-J 10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports) 20 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports) 28 - Frodo Looijaard <frodol@dds.nl> 29 - Jean Delvare <jdelvare@suse.de> 32 ----------- 34 This driver implements support for the National Semiconductor LM78, LM78-J 38 the LM78 and LM78-J are exactly identical. The LM79 has one more VID line, 42 The LM7* implements one temperature sensor, three fan rotation speed sensors, 49 this case, alarms are issued during all the time when the actual temperature [all …]
H A D	pc87360.rst	`22 ----------------- 27 - 0: None 28 - 1: Forcibly enable internal voltage and temperature channels, 30 - 2: Forcibly enable all voltage and temperature channels, except in9 31 - 3: Forcibly enable all voltage and temperature channels, including in9 38 so they can't be used at the same time. 42 ----------- 56 PC87360 - 2 2 - 0xE1 57 PC87363 - 2 2 - 0xE8 58 PC87364 - 3 3 - 0xE4 [all …]`
H A D	lm87.rst	`10 Addresses scanned: I2C 0x2c - 0x2e 18 Addresses scanned: I2C 0x2c - 0x2e 24 - Frodo Looijaard <frodol@dds.nl>, 25 - Philip Edelbrock <phil@netroedge.com>, 26 - Mark Studebaker <mdsxyz123@yahoo.com>, 27 - Stephen Rousset <stephen.rousset@rocketlogix.com>, 28 - Dan Eaton <dan.eaton@rocketlogix.com>, 29 - Jean Delvare <jdelvare@suse.de>, 30 - Original 2.6 port Jeff Oliver 33 ----------- [all …]`
H A D	w83781d.rst	10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports) 12 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/w83781d.pdf 18 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports) 28 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/w83783s.pdf 34 Addresses scanned: I2C 0x28 - 0x2f 42 - Frodo Looijaard <frodol@dds.nl>, 43 - Philip Edelbrock <phil@netroedge.com>, 44 - Mark Studebaker <mdsxyz123@yahoo.com> 47 ----------------- 67 ----------- [all …]
H A D	ina2xx.rst	`10 Addresses: I2C 0x40 - 0x4f 20 Addresses: I2C 0x40 - 0x4f 30 Addresses: I2C 0x40 - 0x4f 40 Addresses: I2C 0x40 - 0x4f 50 Addresses: I2C 0x40 - 0x4f 60 Addresses: I2C 0x40 - 0x4f 70 Addresses: I2C 0x40 - 0x4f 80 ----------- 82 The INA219 is a high-side current shunt and power monitor with an I2C 84 programmable conversion times and filtering. [all …]`
H A D	w83627ehf.rst	`22 * Winbond W83627DHG-P 46 * Winbond W83667HG-B 54 * Nuvoton NCT6775F/W83667HG-I 73 - Jean Delvare <jdelvare@suse.de> 74 - Yuan Mu (Winbond) 75 - Rudolf Marek <r.marek@assembler.cz> 76 - David Hubbard <david.c.hubbard@gmail.com> 77 - Gong Jun <JGong@nuvoton.com> 80 ----------- 83 W83627DHG, W83627DHG-P, W83627UHG, W83667HG, W83667HG-B, W83667HG-I [all …]`
H A D	adc128d818.rst	`17 ----------- 22 The ADC128D818 implements one temperature sensor and seven voltage sensors. 24 Temperatures are measured in degrees Celsius. There is one set of limits. 27 Measurements are guaranteed between -55 and +125 degrees. The temperature 32 An alarm is triggered if the voltage has crossed a programmable minimum 40 already have disappeared by the time the alarm is read. The driver`
/linux/Documentation/ABI/testing/
H A D	sysfs-ptp	41 Write integer to re-configure it. 47 This file contains the number of periodic or one shot 61 This file contains the number of programmable periodic 68 This file contains the number of programmable pins 88 This directory contains one file for each programmable 110 This write-only file enables or disables external 128 This write-only file enables or disables periodic 130 integers into the file: channel index, start time 131 seconds, start time nanoseconds, period seconds, and 139 This write-only file enables or disables delivery of
H A D	sysfs-driver-jz4780-efuse	`1 What: /sys/devices/*/<our-device>/nvmem 4 Description: read-only access to the efuse on the Ingenic JZ4780 SoC 5 The SoC has a one time programmable 8K efuse that is`
/linux/Documentation/watchdog/
H A D	mlx-wdt.rst	`11 Mellanox watchdog device is implemented in a programmable logic device. 19 Get time-left isn't supported 23 a user-defined timeout. 25 Get time-left is supported. 38 Old systems still have only one main watchdog. 54 This mlx-wdt driver supports both HW watchdog implementations. 58 Mellanox watchdog device, identity name (mlx-wdt-main or mlx-wdt-aux), 61 version - type1 or type2. 66 Programmable logic device registers have little-endian order.`
/linux/drivers/leds/flash/
H A D	Kconfig	1 # SPDX-License-Identifier: GPL-2.0 76 will be called "leds-mt6370-flash". 87 channels and each channel is programmable to support up to 1.5 A full 89 to supply one LED component to achieve current up to 2 A. In such case, 91 they will be enabled/disabled at the same time. 93 This driver can be built as a module, it will be called "leds-qcom-flash". 102 RT4505 includes torch and flash functions with programmable current. 115 will be called leds-rt8515. 131 SY7802 includes torch and flash functions with programmable current. 133 This driver can be built as a module, it will be called "leds-sy7802". [all …]
/linux/Documentation/devicetree/bindings/mfd/
H A D	max77620.txt	4 ------------------- 5 - compatible: Must be one of 9 - reg: I2C device address. 12 ------------------- 13 - interrupts: The interrupt on the parent the controller is 15 - interrupt-controller: Marks the device node as an interrupt controller. 16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells 17 variant of <../interrupt-controller/interrupts.txt> 19 are defined at dt-bindings/mfd/max77620.h. 21 - system-power-controller: Indicates that this PMIC is controlling the [all …]
/linux/include/uapi/mtd/
H A D	mtd-abi.h	1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note / 3 Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al. 17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 55 * @MTD_OPS_RAW: data are transferred as-is, with no error correction; 69 * struct mtd_write_req - data structure for requesting a write operation 74 * @usr_data: user-provided data buffer 75 * @usr_oob: user-provided OOB buffer 80 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to 81 * write data-only, set @usr_oob == NULL. However, setting both @usr_data and 95 * struct mtd_read_req_ecc_stats - ECC statistics for a read operation [all …]
/linux/Documentation/devicetree/bindings/nvmem/
H A D	lpc1850-otp.txt	`3 Internal OTP (One Time Programmable) memory for NXP LPC18xx/43xx devices. 6 - compatible: Should be "nxp,lpc1850-otp" 7 - reg: Must contain an entry with the physical base address and length 8 for each entry in reg-names. 9 - address-cells: must be set to 1. 10 - size-cells: must be set to 1. 16 compatible = "nxp,lpc1850-otp"; 18 #address-cells = <1>; 19 #size-cells = <1>;`
/linux/include/uapi/linux/
H A D	ptp_clock.h	`1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note / 3 PTP 1588 clock support - user space interface 83 * struct ptp_clock_time - represents a time value 87 * included for sub-nanosecond resolution, should the demand for 99 int n_alarm; /* Number of programmable alarm [all...]`
/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A D	pipeline.json	8 "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.", 128 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.", 146 "BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).", 150 "PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).", 177 "PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that counts mispredicted return instructions retired.", 204 "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.", 212 "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. This event has a constant ratio with the CPU_CLK_UNHALTED.REF_XCLK event. It is counted on a dedicated fixed counter, leaving the eight programmable counter [all...]
/linux/tools/perf/pmu-events/arch/x86/icelake/
H A D	pipeline.json	8 "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.", 128 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.", 146 "BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).", 150 "PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).", 177 "PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that counts mispredicted return instructions retired.", 204 "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.", 212 "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. This event has a constant ratio with the CPU_CLK_UNHALTED.REF_XCLK event. It is counted on a dedicated fixed counter, leaving the eight programmable counter [all...]
/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	pipeline.json	8 …y executing divide or square root operations. Accounts for integer and floating-point operations.", 128 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.", 146 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX … 150 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE… 177 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that… 204 …reads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or M… 212 …time stamp counter. This event can approximate elapsed time while the core was not in a halt state… 229 …time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For th… 238 …nge from time to time due to power or thermal throttling. For this reason, this event may have a c… 374 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length … [all …]
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A D	pipeline.json	8 …y executing divide or square root operations. Accounts for integer and floating-point operations.", 128 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.", 146 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX … 150 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE… 177 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that… 204 …reads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or M… 212 …time stamp counter. This event can approximate elapsed time while the core was not in a halt state… 229 …time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For th… 238 …nge from time to time due to power or thermal throttling. For this reason, this event may have a c… 355 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length … [all …]
/linux/tools/perf/pmu-events/arch/x86/silvermont/
H A D	pipeline.json	107 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp… 116 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp… 126 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp… 136 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp… 146 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp… 156 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp… 164 …time to time. For this reason this event may have a changing ratio with regards to time. In system… 173 …e core frequency may change from time to time. For this reason this event may have a changing rati… 181 …ange from time. This event is not affected by core frequency changes but counts as if the core is … 189 …time. This event is not affected by core frequency changes but counts as if the core is running at… [all …]

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