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/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcudbg_lib.c1 // SPDX-License-Identifier: GPL-2.0-only
83 /* 1 addr reg SGE_QBASE_INDEX and 4 data reg SGE_QBASE_MAP[0-3] */
188 switch (CHELSIO_CHIP_VERSION(adap->params.chip)) { in cudbg_get_entity_length()
201 len = adap->params.devlog.size; in cudbg_get_entity_length()
204 if (is_t6(adap->params.chip)) { in cudbg_get_entity_length()
205 len = adap->params.cim_la_size / 10 + 1; in cudbg_get_entity_length()
208 len = adap->params.cim_la_size / 8; in cudbg_get_entity_length()
287 len = adap->params.arch.vfcount * in cudbg_get_entity_length()
300 switch (CHELSIO_CHIP_VERSION(adap->params.chip)) { in cudbg_get_entity_length()
357 adap->params.arch.mps_tcam_size; in cudbg_get_entity_length()
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H A Dt4_hw.c4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
43 * t4_wait_op_done_val - wait until an operation is completed
46 * @mask: a single-bit field within @reg that indicates completion
55 * operation completes and -EAGAIN otherwise.
68 if (--attempts == 0) in t4_wait_op_done_val()
69 return -EAGAIN; in t4_wait_op_done_val()
83 * t4_set_reg_field - set a register field to a value
102 * t4_read_indirect - read indirectly addressed registers
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H A Dcxgb4.h4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
62 #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__)
138 FEC_RS = 1 << 1, /* Reed-Solomon */
139 FEC_BASER_RS = 1 << 2 /* BaseR/Reed-Solomon */
184 __u8 size512; /* Current Image Size in units of 512 bytes */
186 __u8 cksum; /* Checksum computed on the entire Image */
262 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */
263 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */
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/linux/drivers/net/ethernet/micrel/
H A Dks8851_spi.c1 // SPDX-License-Identifier: GPL-2.0-only
30 * struct ks8851_net_spi - KS8851 SPI driver private data
35 * @spi_msg1: pre-setup SPI transfer with one message, @spi_xfer1.
36 * @spi_msg2: pre-setup SPI transfer with two messages, @spi_xfer2.
40 * The @lock ensures that the chip is protected when certain operations are
42 * of the chip registers are not ccessible until the transfer is finished and
43 * the DMA has been de-asserted.
64 /* shift for byte-enable data */
67 /* turn register number and byte-enable mask into data for start of packet */
72 * ks8851_lock_spi - register access lock
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/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_mmio.h1 /* SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
29 IPC_MEM_DEVICE_IPC_INVALID = -1
68 * struct iosm_mmio - MMIO region mapped to the doorbell scratchpad.
73 * @chip_info_version: Version of chip info structure
74 * @chip_info_size: Size of chip info structure
94 * ipc_mmio_init - Allocate mmio instance data
103 * ipc_mmio_set_psi_addr_and_size - Set start address and size of the
108 * @size: PSI immage size
111 u32 size);
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/linux/Documentation/devicetree/bindings/usb/
H A Dcdns,usb3.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence USBSS-DRD controller
10 - Pawel Laszczak <pawell@cadence.com>
18 - description: OTG controller registers
19 - description: XHCI Host controller registers
20 - description: DEVICE controller registers
22 reg-names:
24 - const: otg
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/linux/drivers/net/wireless/microchip/wilc1000/
H A Dnetdev.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries.
36 list_for_each_entry_srcu(v, &_w->vif_list, list, \
37 srcu_read_lock_held(&_w->srcu))
61 /* Parameters needed for host interface for remaining on channel */
137 /* The real interface that the monitor is on */
228 * - sending commands to the chip, using info from retrieved vif
229 * - registering a new monitoring net device
296 void wilc_frmw_to_host(struct wilc *wilc, u8 *buff, u32 size, u32 pkt_offset);
299 void wilc_wfi_mgmt_rx(struct wilc *wilc, u8 *buff, u32 size, bool is_auth);
/linux/drivers/net/ethernet/netronome/nfp/nfpcore/
H A Dnfp_cppcore.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
6 * Provides low-level access to the NFP's internal CPP bus
39 * struct nfp_cpp - main nfpcore device structure
40 * Following fields are read-only after probe() exits or netdevs are spawned.
42 * @op: low-level implementation ops
43 * @priv: private data of the low-level implementation
44 * @model: chip model
45 * @interface: chip interface id we are using to reach it
46 * @serial: chip serial number
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/linux/drivers/usb/host/
H A Dfhci-tds.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Jerry Huang <Chang-Ming.Huang@freescale.com>
30 #define TD_I 0x1000 /* interrupt on completion */
33 #define TD_CNF 0x0200 /* CNF - Must be always 1 */
34 #define TD_LSP 0x0100 /* Low-speed transaction */
84 if (!ep->already_pushed_dummy_bd) { in fhci_push_dummy_bd()
85 u16 td_status = in_be16(&ep->empty_td->status); in fhci_push_dummy_bd()
87 out_be32(&ep->empty_td->buf_ptr, DUMMY_BD_BUFFER); in fhci_push_dummy_bd()
89 ep->empty_td = next_bd(ep->td_base, ep->empty_td, td_status); in fhci_push_dummy_bd()
90 ep->already_pushed_dummy_bd = true; in fhci_push_dummy_bd()
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/linux/drivers/net/ethernet/davicom/
H A Ddm9051.c1 // SPDX-License-Identifier: GPL-2.0-only
27 * struct rx_ctl_mach - rx activities record
45 * struct dm9051_rxctrl - dm9051 driver rx control
46 * @hash_table: Multicast hash-table data
50 * such as the multicast hash-filter and the receive register settings
58 * struct dm9051_rxhdr - rx packet data header
65 * packet data and ends with an appended 4-byte CRC data.
76 * struct board_info - maintain the saved data
123 ret = regmap_write(db->regmap_dm, reg, val); in dm9051_set_reg()
125 netif_err(db, drv, db->ndev, "%s: error %d set reg %02x\n", in dm9051_set_reg()
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/linux/drivers/net/ethernet/amd/
H A Dpcnet32.c3 * Copyright 1996-1999 Thomas Bogendoerfer
85 static int tx_start = 1; /* Mapping -- 0:20, 1:64, 2:128, 3:~220 (depends on chip vers) */
113 PCNET32_PORT_ASEL, /* 0 Auto-select */
117 PCNET32_PORT_10BT | PCNET32_PORT_FD, /* 4 10baseT-FD */
123 PCNET32_PORT_MII | PCNET32_PORT_FD, /* 10 MII 10baseT-FD */
127 /* 14 MII 100BaseTx-FD */
140 #define MAX_UNITS 8 /* More are supported, limit only on options */
175 #define PKT_BUF_SIZE (PKT_BUF_SKB - NET_IP_ALIGN)
176 /* chip wants twos complement of the (aligned) buffer length */
177 #define NEG_BUF_SIZE (NET_IP_ALIGN - PKT_BUF_SKB)
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/linux/drivers/mfd/
H A Dsm501.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <linux/platform_data/i2c-gpio.h>
25 #include <linux/sm501-regs.h>
135 unsigned long misct = smc501_readl(sm->regs + SM501_MISC_TIMING); in sm501_dump_clk()
136 unsigned long pm0 = smc501_readl(sm->regs + SM501_POWER_MODE_0_CLOCK); in sm501_dump_clk()
137 unsigned long pm1 = smc501_readl(sm->regs + SM501_POWER_MODE_1_CLOCK); in sm501_dump_clk()
138 unsigned long pmc = smc501_readl(sm->regs + SM501_POWER_MODE_CONTROL); in sm501_dump_clk()
163 dev_dbg(sm->dev, "MISCT=%08lx, PM0=%08lx, PM1=%08lx\n", in sm501_dump_clk()
166 dev_dbg(sm->dev, "PLL2 = %ld.%ld MHz (%ld), SDCLK0=%08lx, SDCLK1=%08lx\n", in sm501_dump_clk()
169 dev_dbg(sm->dev, "SDRAM: PM0=%ld, PM1=%ld\n", sdclk0, sdclk1); in sm501_dump_clk()
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/linux/drivers/mtd/nand/raw/
H A Dsh_flctl.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on fsl_elbc_nand.c, Copyright (c) 2006-2007 Freescale Semiconductor
16 #include <linux/dma-mapping.h>
34 struct nand_chip *chip = mtd_to_nand(mtd); in flctl_4secc_ooblayout_sp_ecc() local
37 return -ERANGE; in flctl_4secc_ooblayout_sp_ecc()
39 oobregion->offset = 0; in flctl_4secc_ooblayout_sp_ecc()
40 oobregion->length = chip->ecc.bytes; in flctl_4secc_ooblayout_sp_ecc()
49 return -ERANGE; in flctl_4secc_ooblayout_sp_free()
51 oobregion->offset = 12; in flctl_4secc_ooblayout_sp_free()
52 oobregion->length = 4; in flctl_4secc_ooblayout_sp_free()
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/linux/drivers/net/ethernet/vertexcom/
H A Dmse102x.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (C) 2021 in-tech smart charging GmbH
4 * driver is based on micrel/ks8851_spi.c
39 #define LEN_MASK GENMASK(CMD_SHIFT - 2, 0)
101 struct mse102x_net_spi *mses = s->private; in mse102x_info_show()
103 seq_printf(s, "TX ring size : %u\n", in mse102x_info_show()
104 skb_queue_len(&mses->mse102x.txq)); in mse102x_info_show()
107 mses->spidev->irq); in mse102x_info_show()
110 (unsigned long)mses->spi_xfer.effective_speed_hz); in mse102x_info_show()
112 mses->spidev->mode); in mse102x_info_show()
[all …]
/linux/drivers/misc/genwqe/
H A Dcard_utils.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
20 #include <linux/page-flags.h>
25 #include <linux/dma-mapping.h>
37 * __genwqe_writeq() - Write 64-bit register
40 * @val: 64-bit value
46 struct pci_dev *pci_dev = cd->pci_dev; in __genwqe_writeq()
48 if (cd->err_inject & GENWQE_INJECT_HARDWARE_FAILURE) in __genwqe_writeq()
49 return -EIO; in __genwqe_writeq()
51 if (cd->mmio == NULL) in __genwqe_writeq()
[all …]
H A Dcard_base.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
42 #define GENWQE_DDCB_MAX 32 /* DDCBs on the work-queue */
62 #define PCI_SUBSYSTEM_ID_GENWQE5 0x035f /* Genwqe A5 Subsystem-ID */
63 #define PCI_SUBSYSTEM_ID_GENWQE5_NEW 0x044b /* Genwqe A5 Subsystem-ID */
67 #define PCI_SUBSYSTEM_ID_GENWQE5_SRIOV 0x0000 /* Genwqe A5 Subsystem-ID */
73 * struct genwqe_reg - Genwqe data dump functionality
82 * enum genwqe_dbg_type - Specify chip unit to dump/debug
99 #define GENWQE_INJECT_HARDWARE_FAILURE 0x00000001 /* injects -1 reg reads */
107 * Error-handling in case of card malfunction
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/linux/drivers/net/ethernet/i825xx/
H A Dsun3_82586.h1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * copyrights (c) 1994 by Michael Hipp (hippm@informatik.uni-tuebingen.de)
11 * crynwr-packet-driver by Russ Nelson
12 * Garret A. Wollman's i82586-driver for BSD
22 /* defines for the obio chip (not vme) */
24 #define IEOB_ONAIR 0x40 /* put us on the air */
53 char *iscp; /* pointer to the iscp-block */
65 char *scb_base; /* base-address of all 16-bit offsets */
79 unsigned short crc_errs; /* CRC-Error counter */
89 #define RUC_NOP 0x0000 /* NOP-command */
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/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_ethtool.c3 * Copyright (c) 2007-2013 Broadcom Corporation
13 * Based on code from Michael Chan's bnx2 driver
32 /* Note: in the format strings below %s is replaced by the queue-name which is
34 * length does not exceed ETH_GSTRING_LEN - MAX_QUEUE_NAME_LEN + 2
39 int size; member
76 int size; member
196 switch (bp->link_params.phy[phy_idx].media_type) { in bnx2x_get_port_type()
228 cmd->link_modes.supported); in bnx2x_get_vf_link_ksettings()
230 cmd->link_modes.advertising); in bnx2x_get_vf_link_ksettings()
232 if (bp->state == BNX2X_STATE_OPEN) { in bnx2x_get_vf_link_ksettings()
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/linux/drivers/bluetooth/
H A Dbtrtl.c1 // SPDX-License-Identifier: GPL-2.0-or-later
130 /* 8723CS-CG */
140 .hw_info = "rtl8723cs-cg" },
142 /* 8723CS-VF */
152 .hw_info = "rtl8723cs-vf" },
154 /* 8723CS-XX */
323 /* 8852BT/8852BE-VT */
376 if (skb->len != sizeof(struct hci_rp_read_local_version)) { in btrtl_read_local_version()
379 return ERR_PTR(-EIO); in btrtl_read_local_version()
398 if (skb->len != sizeof(*rom_version)) { in rtl_read_rom_version()
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/linux/drivers/scsi/qla2xxx/
H A Dqla_nx2.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2003-2014 QLogic Corporation
36 return readl((void __iomem *) (ha->nx_pcibase + addr)); in qla8044_rd_reg()
42 writel(val, (void __iomem *)((ha)->nx_pcibase + addr)); in qla8044_wr_reg()
49 struct qla_hw_data *ha = vha->hw; in qla8044_rd_direct()
62 struct qla_hw_data *ha = vha->hw; in qla8044_wr_direct()
73 struct qla_hw_data *ha = vha->hw; in qla8044_set_win_base()
75 qla8044_wr_reg(ha, QLA8044_CRB_WIN_FUNC(ha->portnum), addr); in qla8044_set_win_base()
76 val = qla8044_rd_reg(ha, QLA8044_CRB_WIN_FUNC(ha->portnum)); in qla8044_set_win_base()
92 struct qla_hw_data *ha = vha->hw; in qla8044_rd_reg_indirect()
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/linux/drivers/usb/storage/
H A Disd200.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Transport & Protocol Driver for In-System Design, Inc. ISD200 ASIC
6 * (C) 2001-2002 Björn Stenberg (bjorn@haxx.se)
12 * (C) 2000 In-System Design, Inc. (support@in-system.com)
14 * The ISD200 ASIC does not natively support ATA devices. The chip
20 * 2002-10-19: Removed the specialized transfer routines.
22 * 2001-02-24: Removed lots of duplicate code and simplified the structure.
24 * 2002-01-16: Fixed endianness bug so it works on the ppc arch.
26 * 2002-01-17: All bitfields removed.
51 #define DRV_NAME "ums-isd200"
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/linux/Documentation/arch/m68k/
H A Dkernel-options.rst9 Author: Roman.Hodek@informatik.uni-erlangen.de (Roman Hodek)
11 Update: jds@kom.auc.dk (Jes Sorensen) and faq@linux-m68k.org (Chris Lawrence)
29 The kernel knows three kinds of options on its command line:
58 ----------
65 on it.
76 /dev/ram: -> 0x0100 (initial ramdisk)
77 /dev/hda: -> 0x0300 (first IDE disk)
78 /dev/hdb: -> 0x0340 (second IDE disk)
79 /dev/sda: -> 0x0800 (first SCSI disk)
80 /dev/sdb: -> 0x0810 (second SCSI disk)
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/linux/drivers/net/ethernet/intel/
H A De100.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
7 * (Re)written 2003 by scott.feldman@intel.com. Based loosely on
26 * LAN-On-Motherboard (LOM), CardBus, MiniPCI, and ICHx
27 * configurations. 8255x supports a 32-bit linear addressing
32 * Memory-mapped mode is used exclusively to access the device's
33 * shared-memory structure, the Control/Status Registers (CSR). All
39 * 8255x is highly MII-compliant and all access to the PHY go
41 * driver leverages the mii.c library shared with other MII-compliant
44 * Big- and Little-Endian byte order as well as 32- and 64-bit
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb4vf/
H A Dsge.c2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
43 #include <linux/dma-mapping.h>
63 * 64-bit PCI DMA addresses.
106 ETHTXQ_MAX_SGL_LEN = ((3 * (ETHTXQ_MAX_FRAGS-1))/2 +
107 ((ETHTXQ_MAX_FRAGS-1) & 1) +
125 * Max size of a WR sent through a control TX queue.
140 * in-line room in skb's to accommodate pulling in RX_PULL_LEN bytes
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/linux/drivers/comedi/drivers/
H A Dadl_pci9118.c1 // SPDX-License-Identifier: GPL-2.0
6 * card: PCI-9118DG, PCI-9118HG, PCI-9118HR
15 * Description: Adlink PCI-9118DG, PCI-9118HG, PCI-9118HR
17 * Devices: [ADLink] PCI-9118DG (pci9118dg), PCI-9118HG (pci9118hg),
18 * PCI-9118HR (pci9118hr)
25 * - If cmd->scan_begin_src=TRIG_EXT then trigger input is TGIN (pin 46).
26 * - If cmd->convert_src=TRIG_EXT then trigger input is EXTTRG (pin 44).
27 * - If cmd->start_src/stop_src=TRIG_EXT then trigger input is TGIN (pin 46).
28 * - It is not necessary to have cmd.scan_end_arg=cmd.chanlist_len but
30 * - If return value of cmdtest is 5 then you've bad channel list
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