Searched +full:omap3430 +full:- +full:gpmc (Results 1 – 15 of 15) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | gpmc-onenand.txt | 1 Device tree bindings for GPMC connected OneNANDs 3 GPMC connected OneNAND (found on OMAP boards) are represented as child nodes of 4 the GPMC controller with a name of "onenand". 6 All timing relevant properties as well as generic gpmc child properties are 7 explained in a separate documents - please refer to 8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt 12 - compatible: "ti,omap2-onenand" 13 - reg: The CS line the peripheral is connected to 14 - gpmc,device-width: Width of the ONENAND device connected to the GPMC 19 - int-gpios: GPIO specifier for the INT pin. [all …]
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H A D | ti,gpmc-onenand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-onenand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: OneNAND over Texas Instruments GPMC bus. 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 14 GPMC connected OneNAND (found on OMAP boards) are represented 15 as child nodes of the GPMC controller. 19 pattern: "^onenand@[0-9],[0,9]$" [all …]
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H A D | gpmc-nor.txt | 1 Device tree bindings for NOR flash connect to TI GPMC 3 NOR flash connected to the TI GPMC (found on OMAP boards) are represented as 4 child nodes of the GPMC controller with a name of "nor". 6 All timing relevant properties as well as generic GPMC child properties are 8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt 11 - bank-width: Width of NOR flash in bytes. GPMC supports 8-bit and 12 16-bit devices and so must be either 1 or 2 bytes. 13 - compatible: Documentation/devicetree/bindings/mtd/mtd-physmap.yaml 14 - gpmc,cs-on-ns: Chip-select assertion time 15 - gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads [all …]
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | omap3430-sdp.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 10 model = "TI OMAP3430 SDP"; 11 compatible = "ti,omap3430-sdp", "ti,omap3430", "ti,omap3"; 20 clock-frequency = <2600000>; 32 vmmc-supply = <&vmmc1>; 33 vqmmc-supply = <&vsim>; 35 * S6-3 must be in ON position for 8 bit mode to function 38 bus-width = <8>; [all …]
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H A D | omap3-ldp.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 7 #include <dt-bindings/input/input.h> 9 #include "omap-gpmc-smsc911x.dtsi" 12 model = "TI OMAP3430 LDP (Zoom1 Labrador)"; 13 compatible = "ti,omap3-ldp", "ti,omap3430", "ti,omap3"; 22 cpu0-supply = <&vcc>; 27 compatible = "gpio-keys"; 28 pinctrl-names = "default"; [all …]
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H A D | omap3-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "omap3-evm-common.dtsi" 9 #include "omap3-evm-processor-common.dtsi" 13 compatible = "ti,omap3-evm", "ti,omap3430", "ti,omap3"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&hsusb2_2_pins>; 20 ehci_phy_pins: ehci-phy-pins { 21 pinctrl-single,pins = < [all …]
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H A D | omap3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/omap.h> 14 compatible = "ti,omap3430", "ti,omap3"; 15 interrupt-parent = <&intc>; 16 #address-cells = <1>; 17 #size-cells = <1>; [all …]
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H A D | logicpd-torpedo-35xx-devkit.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 /dts-v1/; 6 #include "logicpd-torpedo-som.dtsi" 7 #include "logicpd-torpedo-baseboard.dtsi" 8 #include "omap-gpmc-smsc9221.dtsi" 12 compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3430", "ti,omap3"; 16 isp1763_pins: isp1763-pins { 17 pinctrl-single,pins = <
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H A D | logicpd-som-lv-35xx-devkit.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 /dts-v1/; 6 #include "logicpd-som-lv.dtsi" 7 #include "logicpd-som-lv-baseboard.dtsi" 8 #include "omap-gpmc-smsc9221.dtsi" 11 model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit"; 12 compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3430", "ti,omap3"; 16 pinctrl-names = "default"; 17 pinctrl-0 = <&hsusb2_2_pins>; 18 hsusb2_2_pins: hsusb2-2-pins { [all …]
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H A D | omap3-sbc-t3530.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Suppport for CompuLab SBC-T3530 with CM-T3530 6 #include "omap3-cm-t3530.dts" 7 #include "omap3-sb-t35.dtsi" 10 model = "CompuLab SBC-T3530 with CM-T3530"; 11 …compatible = "compulab,omap3-sbc-t3530", "compulab,omap3-cm-t3530", "ti,omap3430", "ti,omap34xx", … 20 pinctrl-names = "default"; 21 pinctrl-0 = <&sb_t35_usb_hub_pins>; 23 sb_t35_usb_hub_pins: sb-t35-usb-hub-pins { 24 pinctrl-single,pins = < [all …]
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H A D | omap3-beagle.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 11 compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3"; 15 cpu0-supply = <&vcc>; 30 compatible = "gpio-leds"; 31 led-pmu-stat { 36 led-heartbeat { 38 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */ 39 linux,default-trigger = "heartbeat"; [all …]
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H A D | omap3-n900.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi> 7 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/media/video-interfaces.h> 15 * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall 17 * blocks then kernel receive "Unhandled fault: external abort on non-linefetch" 18 * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no 34 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | omap-gpmc.txt | 1 Device tree bindings for OMAP general purpose memory controllers (GPMC) 3 The actual devices are instantiated from the child nodes of a GPMC node. 7 - compatible: Should be set to one of the following: 9 ti,omap2420-gpmc (omap2420) 10 ti,omap2430-gpmc (omap2430) 11 ti,omap3430-gpmc (omap3430 & omap3630) 12 ti,omap4430-gpmc (omap4430 & omap4460 & omap543x) 13 ti,am3352-gpmc (am335x devices) 15 - reg: A resource specifier for the register space 17 - ti,hwmods: Should be set to "ti,gpmc" until the DT transition is [all …]
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H A D | ti,gpmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controller [all...] |
/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | gpmc-eth.txt | 1 Device tree bindings for Ethernet chip connected to TI GPMC 4 General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices 5 such as ethernet controllers to processors using the TI GPMC as a data bus. 7 Ethernet controllers connected to TI GPMC are represented as child nodes of 8 the GPMC controller with an "ethernet" name. 10 All timing relevant properties as well as generic GPMC child properties are 12 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt 14 For the properties relevant to the ethernet controller connected to the GPMC 18 Child nodes need to specify the GPMC bus address width using the "bank-width" 20 specify the I/O registers address width. Even when the GPMC has a maximum 16-bit [all …]
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