/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | ti,gpmc-child.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 24 gpmc,sync-clk-ps: 28 # Chip-select signal timings corresponding to GPMC_CONFIG2: 29 gpmc,cs-on-ns: 33 gpmc,cs-rd-off-ns: [all …]
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H A D | omap-gpmc.txt | 7 - compatible: Should be set to one of the following: 9 ti,omap2420-gpmc (omap2420) 10 ti,omap2430-gpmc (omap2430) 11 ti,omap3430-gpmc (omap3430 & omap3630) 12 ti,omap4430-gpmc (omap4430 & omap4460 & omap543x) 13 ti,am3352-gpmc (am335x devices) 15 - reg: A resource specifier for the register space 17 - ti,hwmods: Should be set to "ti,gpmc" until the DT transition is 19 - #address-cells: Must be set to 2 to allow memory address translation 20 - #size-cells: Must be set to 1 to allow CS address passing [all …]
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | omap3430-sdp.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 11 compatible = "ti,omap3430-sdp", "ti,omap3430", "ti,omap3"; 20 clock-frequency = <2600000>; 32 vmmc-supply = <&vmmc1>; 33 vqmmc-supply = <&vsim>; 35 * S6-3 must be in ON position for 8 bit mode to function 38 bus-width = <8>; 55 compatible = "cfi-flash"; [all …]
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H A D | omap-gpmc-smsc911x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Common file for GPMC connected smsc911x on omaps 10 vddvario: regulator-vddvario { 11 compatible = "regulator-fixed"; 12 regulator-name = "vddvario"; 13 regulator-always-on; 16 vdd33a: regulator-vdd33a { 17 compatible = "regulator-fixed"; 18 regulator-name = "vdd33a"; 19 regulator-always-on; [all …]
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H A D | omap-gpmc-smsc9221.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Common file for GPMC connected smsc9221 on omaps 14 vddvario: regulator-vddvario { 15 compatible = "regulator-fixed"; 16 regulator-name = "vddvario"; 17 regulator-always-on; 20 vdd33a: regulator-vdd33a { 21 compatible = "regulator-fixed"; 22 regulator-name = "vdd33a"; 23 regulator-always-on; [all …]
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H A D | omap3-overo-tobiduo-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include "omap3-overo-common-peripherals.dtsi" 12 #include "omap-gpmc-smsc9221.dtsi" 17 interrupt-parent = <&gpio6>; 23 bank-width = <2>; 25 gpmc,mux-add-data = <0>; 26 gpmc,cs-on-ns = <0>; 27 gpmc,cs-rd-off-ns = <42>; 28 gpmc,cs-wr-off-ns = <36>; 29 gpmc,adv-on-ns = <6>; [all …]
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H A D | omap2420-h4.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 11 compatible = "ti,omap2420-h4", "ti,omap2420", "ti,omap2"; 23 compatible = "cfi-flash"; 24 linux,mtd-name = "intel,ge28f256l18b85"; 25 #address-cells = <1>; 26 #size-cells = <1>; 28 bank-width = <2>; 30 gpmc,mux-add-data = <2>; [all …]
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H A D | omap2430-sdp.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 11 compatible = "ti,omap2430-sdp", "ti,omap2430", "ti,omap2"; 20 clock-frequency = <100000>; 31 vmmc-supply = <&vmmc1>; 32 bus-width = <4>; 39 interrupt-parent = <&gpio5>; 42 bank-width = <2>; 43 gpmc,sync-clk-ps = <0>; [all …]
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H A D | omap2420-n8x0-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 stdout-path = &uart3; 16 compatible = "i2c-cbus-gpio"; 21 #address-cells = <1>; 22 #size-cells = <0>; 25 interrupt-parent = <&gpio4>; 34 clock-frequency = <400000>; 44 clock-frequency = <400000>; 50 /* gpio-irq for dma: 26 */ 53 #address-cells = <1>; [all …]
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H A D | omap3-igep.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Common device tree for IGEP boards based on AM/DM37x 8 /dts-v1/; 19 stdout-path = &uart3; 23 compatible = "ti,omap-twl4030"; 28 vdd33: regulator-vdd33 { 29 compatible = "regulator-fixed"; 30 regulator-name = "vdd33"; 31 regulator-always-on; 37 gpmc_pins: gpmc-pins { [all …]
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H A D | omap-zoom-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Common features on the Zoom debug board 6 #include "omap-gpmc-smsc911x.dtsi" 13 * Four port TL16CP754C serial port on GPMC, 20 bank-width = <2>; 21 reg-shift = <1>; 22 reg-io-width = <1>; 23 interrupt-parent = <&gpio4>; 25 clock-frequency = <1843200>; 26 current-speed = <115200>; [all …]
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H A D | omap3-sb-t35.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730 10 powerdown-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; /* gpio_54 */ 12 pinctrl-names = "default"; 13 pinctrl-0 = <&tfp410_pins>; 16 #address-cells = <1>; 17 #size-cells = <0>; 23 remote-endpoint = <&dpi_out>; 31 remote-endpoint = <&dvi_connector_in>; 37 dvi0: dvi-connector { [all …]
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H A D | omap3-gta04a5one.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com> 6 #include "omap3-gta04a5.dts" 13 gpmc_pins: gpmc-pins { 14 pinctrl-single,pins = < 33 * according to TRM. OneNAND seems to require PIN_INPUT on clock. 45 pinctrl-names = "default"; 46 pinctrl-0 = <&gpmc_pins>; 48 /delete-node/ nand@0,0; 52 #address-cells = <1>; [all …]
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H A D | am335x-chilisom.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2015 Jablotron s.r.o. -- https://www.jablotron.com/ 7 #include <dt-bindings/interrupt-controller/irq.h> 11 compatible = "grinn,am335x-chilisom", "ti,am33xx"; 15 cpu0-supply = <&dcdc2_reg>; 26 pinctrl-names = "default"; 28 i2c0_pins: i2c0-pins { 29 pinctrl-single,pins = < 35 nandflash_pins: nandflash-pins { 36 pinctrl-single,pins = < [all …]
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H A D | am335x-nano.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/ 5 /dts-v1/; 15 cpu0-supply = <&dcdc2_reg>; 25 compatible = "gpio-leds"; 30 default-state = "off"; 36 pinctrl-names = "default"; 37 pinctrl-0 = <&misc_pins>; 39 misc_pins: misc-pins { 40 pinctrl-single,pins = < [all …]
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H A D | dm8148-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 5 #include <dt-bindings/interrupt-controller/irq.h> 9 compatible = "ti,dm8148-evm", "ti,dm8148", "ti,dm814"; 18 compatible = "regulator-fixed"; 19 regulator-name = "vmmcsd_fixed"; 20 regulator-min-microvolt = <3300000>; 21 regulator-max-microvolt = <3300000>; 26 phy-handle = <ðphy0>; 27 phy-mode = "rgmii-id"; [all …]
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H A D | dra62x-j5eco-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 5 #include <dt-bindings/interrupt-controller/irq.h> 9 compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148", "ti,dm814"; 18 compatible = "regulator-fixed"; 19 regulator-name = "vmmcsd_fixed"; 20 regulator-min-microvolt = <3300000>; 21 regulator-max-microvolt = <3300000>; 26 phy-handle = <ðphy0>; 27 phy-mode = "rgmii-id"; [all …]
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H A D | omap3-lilly-a83x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 model = "INCOstartec LILLY-A83X module (DM3730)"; 10 compatible = "incostartec,omap3-lilly-a83x", "ti,omap3630", "ti,omap36xx", "ti,omap3"; 22 compatible = "gpio-leds"; 25 label = "lilly-a83x::led1"; 27 linux,default-trigger = "default-on"; 33 compatible = "ti,omap-twl4030"; 34 ti,model = "lilly-a83x"; 40 compatible = "regulator-fixed"; 41 regulator-name = "VCC3"; [all …]
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H A D | omap4-duovero-parlor.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 5 /dts-v1/; 7 #include "omap4-duovero.dtsi" 9 #include <dt-bindings/input/input.h> 12 model = "OMAP4430 Gumstix Duovero on Parlor"; 13 compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4"; 20 compatible = "gpio-leds"; 24 linux,default-trigger = "heartbeat"; 29 compatible = "gpio-keys"; 30 #address-cells = <1>; [all …]
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H A D | omap3-devkit8000-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/input/input.h> 16 compatible = "gpio-leds"; 18 led-heartbeat { 20 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* 186 -> LED1 */ 21 default-state = "on"; [all...] |
H A D | omap3-lilly-dbb056.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 /dts-v1/; 7 #include "omap3-lilly-a83x.dtsi" 10 model = "INCOstartec LILLY-DBB056 (DM3730)"; 11 …compatible = "incostartec,omap3-lilly-dbb056", "incostartec,omap3-lilly-a83x", "ti,omap3630", "ti,… 15 vaux2: regulator-vaux2 { 16 compatible = "ti,twl4030-vaux2"; 17 regulator-min-microvolt = <2800000>; 18 regulator-max-microvolt = <2800000>; 19 regulator-always-on; [all …]
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H A D | am335x-igep0033.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x 5 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz 8 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/irq.h> 16 cpu0-supply = <&vdd1_reg>; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&leds_pins>; 29 compatible = "gpio-leds"; 34 default-state = "on"; [all …]
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H A D | dm8168-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 5 #include <dt-bindings/interrupt-controller/irq.h> 9 compatible = "ti,dm8168-evm", "ti,dm8168", "ti,dm816"; 19 compatible = "regulator-fixed"; 20 regulator-name = "vmmcsd_fixed"; 21 regulator-min-microvolt = <3300000>; 22 regulator-max-microvolt = <3300000>; 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | gpmc-nor.txt | 3 NOR flash connected to the TI GPMC (found on OMAP boards) are represented as 8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt 11 - bank-width: Width of NOR flash in bytes. GPMC supports 8-bit and 12 16-bit devices and so must be either 1 or 2 bytes. 13 - compatible: Documentation/devicetree/bindings/mtd/mtd-physmap.yaml 14 - gpmc,cs-on-ns: Chip-select assertion time 15 - gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads 16 - gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes 17 - gpmc,oe-on-ns: Output-enable assertion time 18 - gpmc,oe-off-ns: Output-enable de-assertion time [all …]
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/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | gpmc-eth.txt | 4 General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices 12 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt 18 Child nodes need to specify the GPMC bus address width using the "bank-width" 20 specify the I/O registers address width. Even when the GPMC has a maximum 16-bit 21 address width, it supports devices with 32-bit word registers. 22 For example with an SMSC LAN911x/912x controller connected to the TI GPMC on an 23 OMAP2+ board, "bank-width = <2>;" and "reg-io-width = <4>;". 26 - bank-width: Address width of the device in bytes. GPMC supports 8-bit 27 and 16-bit devices and so must be either 1 or 2 bytes. 28 - compatible: Compatible string property for the ethernet child device. [all …]
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