Searched +full:ocelot +full:- +full:sgpio (Results 1 – 4 of 4) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/mfd/ |
H A D | mscc,ocelot.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ 3 --- 4 $id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Ocelot Externally-Controlled Ethernet Switch 10 - Colin Foster <colin.foster@in-advantage.com> 13 The Ocelot ethernet switch family contains chips that have an internal CPU 18 The switch family is a multi-port networking switch that supports many 25 - mscc,vsc7512 30 "#address-cells": [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/microchip/ |
H A D | sparx5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/clock/microchip,sparx5.h> 12 interrupt-parent = <&gic>; 13 #address-cell [all...] |
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | microchip,sparx5-sgpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/microchip,sparx5-sgpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lars Povlsen <lars.povlsen@microchip.com> 21 pattern: "^gpio@[0-9a-f]+$" 25 - microchip,sparx5-sgpio 26 - mscc,ocelot-sgpio 27 - mscc,luton-sgpio 29 "#address-cells": [all …]
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/freebsd/sys/contrib/device-tree/src/mips/mscc/ |
H A D | serval.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 28 cpuintc: interrupt-controller { 29 #address-cells = <0>; 30 #interrupt-cells = <1>; 31 interrupt-controller; 32 compatible = "mti,cpu-interrupt-controller"; [all …]
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