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/linux/Documentation/devicetree/bindings/usb/
H A Dti,omap4-musb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,omap4-musb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@ti.com>
14 Handles SoC-specific integration including PHY interface bridging(ULPI/
23 - ti,omap3-musb
24 - ti,omap4-musb
33 interrupt-names:
36 - const: mc
[all …]
H A Dam33xx-usb.txt3 - compatible: ti,am33xx-usb
4 - reg: offset and length of the usbss register sets
5 - ti,hwmods : must be "usb_otg_hs"
13 - compatible: ti,am335x-usb-ctrl-module
14 - reg: offset and length of the "USB control registers" in the "Control
17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
22 compatible: ti,am335x-usb-phy
25 reg-names: phy
31 - compatible: ti,musb-am33xx
32 - reg: offset and length of "USB Controller Registers", and offset and
[all …]
/linux/drivers/usb/host/
H A Dxhci-debugfs.c1 // SPDX-License-Identifier: GPL-2.0
3 * xhci-debugfs.c - xHCI debugfs interface
14 #include "xhci-debugfs.h"
98 INIT_LIST_HEAD(&regset->list); in xhci_debugfs_alloc_regset()
99 list_add_tail(&regset->list, &xhci->regset_list); in xhci_debugfs_alloc_regset()
109 list_del(&regset->list); in xhci_debugfs_free_regset()
129 vsnprintf(rgs->name, sizeof(rgs->name), fmt, args); in xhci_debugfs_regset()
132 regset = &rgs->regset; in xhci_debugfs_regset()
133 regset->regs = regs; in xhci_debugfs_regset()
134 regset->nregs = nregs; in xhci_debugfs_regset()
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H A Dxhci-ring.c1 // SPDX-License-Identifier: GPL-2.0
26 * until you reach a non-link TRB.
59 #include <linux/dma-mapping.h>
61 #include "xhci-trace.h"
76 if (!seg || !trb || trb < seg->trbs) in xhci_trb_virt_to_dma()
79 segment_offset = trb - seg->trbs; in xhci_trb_virt_to_dma()
82 return seg->dma + (segment_offset * sizeof(*trb)); in xhci_trb_virt_to_dma()
92 if (in_range(dma, seg->dma, TRB_SEGMENT_SIZE)) { in xhci_dma_to_trb()
95 return &seg->trbs[(dma - seg->dma) / sizeof(union xhci_trb)]; in xhci_dma_to_trb()
104 return TRB_TYPE_NOOP_LE32(trb->generic.field[3]); in trb_is_noop()
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/linux/drivers/usb/gadget/udc/
H A Ddummy_hcd.c1 // SPDX-License-Identifier: GPL-2.0+
3 * dummy_hcd.c -- Dummy/Loopback USB host and device emulator driver.
8 * Copyright (C) 2003-2005 Alan Stern
14 * Linux-USB host controller driver. USB traffic is simulated; there's
17 * - Gadget driver, responding to requests (device);
18 * - Host-side device driver, as already familiar in Linux.
51 #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */
68 unsigned int num; member
74 .num = 1,
80 module_param_named(num, mod_data.num, uint, S_IRUGO);
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H A Dnet2280.c1 // SPDX-License-Identifier: GPL-2.0+
27 * Copyright (C) 2003-2005 PLX Technology, Inc.
28 * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
39 #include <linux/dma-mapping.h>
87 EP_INFO("ep-a",
89 EP_INFO("ep-b",
91 EP_INFO("ep-c",
93 EP_INFO("ep-d",
95 EP_INFO("ep-e",
97 EP_INFO("ep-f",
[all …]
H A Dgr_udc.c1 // SPDX-License-Identifier: GPL-2.0+
14 * - Andreas Larsson <andreas@gaisler.com>
15 * - Marko Isomaki
36 #include <linux/dma-mapping.h>
64 /* ---------------------------------------------------------------------- */
93 int buflen = ep->is_in ? req->req.length : req->req.actual; in gr_dbgprint_request()
97 dev_dbg(ep->dev->dev, "%s: 0x%p, %d bytes data%s:\n", str, req, buflen, in gr_dbgprint_request()
100 rowlen, 4, req->req.buf, plen, false); in gr_dbgprint_request()
106 dev_vdbg(dev->dev, "REQ: %02x.%02x v%04x i%04x l%04x\n", in gr_dbgprint_devreq()
119 /* ---------------------------------------------------------------------- */
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H A Dpch_udc.c1 // SPDX-License-Identifier: GPL-2.0
175 #define PCH_UDC_EPINT(in, num)\ argument
176 (1 << (num + (in ? UDC_EPINT_IN_SHIFT : UDC_EPINT_OUT_SHIFT)))
189 #define PCH_UDC_EP_NUM 32 /* Total number of EPs (16 IN,16 OUT) */
211 * struct pch_udc_data_dma_desc - Structure to hold DMA descriptor information
226 * struct pch_udc_stp_dma_desc - Structure to hold DMA descriptor information
256 * struct pch_udc_cfg_data - Structure to hold current configuration
269 * struct pch_udc_ep - Structure holding a PCH USB device Endpoint information
278 * @num: endpoint number
292 unsigned num:5, member
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/linux/drivers/usb/gadget/udc/cdns2/
H A Dcdns2-gadget.c1 // SPDX-License-Identifier: GPL-2.0
3 * Cadence USBHS-DEV Driver - gadget side.
28 #include <linux/dma-mapping.h>
36 #include "cdns2-gadget.h"
37 #include "cdns2-trace.h"
40 * set_reg_bit_32 - set bit in given 32 bits register.
51 * clear_reg_bit_32 - clear bit in given 32 bits register.
80 dma_index = readl(&pdev->adma_regs->ep_traddr) - pep->ring.dma; in cdns2_get_dma_pos()
93 if (pdev->selected_ep == ep) in cdns2_select_ep()
96 pdev->selected_ep = ep; in cdns2_select_ep()
[all …]
H A Dcdns2-gadget.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * USBHS-DEV device controller driver header file
14 #include <linux/dma-direction.h>
22 * struct cdns2_ep0_regs - endpoint 0 related registers.
45 /* EP0CS - bitmasks. */
59 /* EP0FIFO - bitmasks. */
70 * struct cdns2_epx_base - base endpoint registers.
87 /* rxcon/txcon - endpoint control register bitmasks. */
88 /* Endpoint buffering: 0 - single buffering ... 3 - quad buffering. */
106 /* rxcs/txcs - endpoint control and status bitmasks. */
[all …]
/linux/drivers/usb/usbip/
H A Dvudc_dev.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (C) 2015-2016 Samsung Electronics
23 #define VIRTUAL_ENDPOINTS (1 /* ep0 */ + 15 /* in eps */ + 15 /* out eps */)
25 /* urb-related structures alloc / free */
33 kfree(urb->setup_packet); in free_urb()
34 urb->setup_packet = NULL; in free_urb()
36 kfree(urb->transfer_buffer); in free_urb()
37 urb->transfer_buffer = NULL; in free_urb()
50 urb_p->urb = NULL; in alloc_urbp()
51 urb_p->ep = NULL; in alloc_urbp()
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/linux/drivers/usb/gadget/function/
H A Df_fs.c1 // SPDX-License-Identifier: GPL-2.0+
3 * f_fs.c -- user mode file system API for USB composite function controllers
9 * Copyright (C) 2003-2004 David Brownell
18 #include <linux/dma-buf.h>
19 #include <linux/dma-fence.h>
20 #include <linux/dma-resv.h>
64 /* Called with ffs->mutex held; take over ownership of data. */
80 struct ffs_ep *eps; member
99 cmpxchg(&ffs->setup_state, FFS_SETUP_CANCELLED, FFS_NO_SETUP); in ffs_setup_state_clear_cancelled()
120 static int ffs_func_revmap_ep(struct ffs_function *func, u8 num);
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/linux/drivers/usb/cdns3/
H A Dcdns3-gadget.c1 // SPDX-License-Identifier: GPL-2.0
3 * Cadence USBSS DRD Driver - gadget side.
5 * Copyright (C) 2018-2019 Cadence Design Systems.
6 * Copyright (C) 2017-2018 NXP
32 * Controller for OUT endpoints has shared on-chip buffers for all incoming
37 * Additionally the packets directed to one endpoint can block entire on-chip
59 #include <linux/dma-mapping.h>
67 #include "gadget-export.h"
68 #include "cdns3-gadget.h"
69 #include "cdns3-trace.h"
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H A Dcdns3-gadget.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2018-2019 Cadence.
6 * Copyright (C) 2017-2018 NXP
15 #include <linux/dma-direction.h>
18 * USBSS-DEV register interface.
23 * struct cdns3_usb_regs - device controller registers.
53 * @buf_addr: Address for On-chip Buffer operations.
54 * @buf_data: Data for On-chip Buffer operations.
55 * @buf_ctrl: On-chip Buffer Access Control.
123 /* USB_CONF - bitmasks */
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam33xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/am33xx.h>
11 #include <dt-bindings/clock/am3.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 d-can0 = &dcan0;
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/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h8 * Copyright (c) 1999-2007 Tensilica Inc.
25 /*----------------------------------------------------------------------
27 ----------------------------------------------------------------------*/
29 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */
31 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */
35 #define XCHAL_HAVE_DENSITY 1 /* 16-bit instructions */
36 #define XCHAL_HAVE_LOOPS 1 /* zero-overhead loops */
46 #define XCHAL_HAVE_ABSOLUTE_LITERALS 1 /* non-PC-rel (extended) L32R */
60 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */
68 #define XCHAL_HAVE_VECTORFPU2005 0 /* vector floating-point pkg */
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/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h2 * xtensa/config/core-isa.h -- HAL definitions that are dependent on Xtensa
10 Copyright (c) 1999-2010 Tensilica Inc.
45 /*----------------------------------------------------------------------
47 ----------------------------------------------------------------------*/
49 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */
51 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */
55 #define XCHAL_HAVE_DENSITY 1 /* 16-bit instructions */
56 #define XCHAL_HAVE_LOOPS 1 /* zero-overhead loops */
66 #define XCHAL_HAVE_ABSOLUTE_LITERALS 1 /* non-PC-rel (extended) L32R */
80 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */
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/linux/include/linux/
H A Dusb.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include <linux/errno.h> /* for -ENODEV */
30 /*-------------------------------------------------------------------------*/
33 * Host-side wrappers for standard USB descriptors ... these are parsed
37 * - devices have one (usually) or more configs;
38 * - configs have one (often) or more interfaces;
39 * - interfaces have one (usually) or more settings;
40 * - each interface setting has zero or (usually) more endpoints.
41 * - a SuperSpeed endpoint has a companion descriptor
45 * Devices may also have class-specific or vendor-specific descriptors.
[all …]
/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h2 * xtensa/config/core-isa.h -- HAL definitions that are dependent on Xtensa
10 Copyright (c) 1999-2015 Tensilica Inc.
45 /*----------------------------------------------------------------------
47 ----------------------------------------------------------------------*/
49 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */
51 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */
55 #define XCHAL_HAVE_DENSITY 1 /* 16-bit instructions */
56 #define XCHAL_HAVE_LOOPS 1 /* zero-overhead loops */
57 #define XCHAL_LOOP_BUFFER_SIZE 0 /* zero-ov. loop instr buffer size */
68 #define XCHAL_HAVE_ABSOLUTE_LITERALS 0 /* non-PC-rel (extended) L32R */
[all …]
/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h2 * xtensa/config/core-isa.h -- HAL definitions that are dependent on Xtensa
10 Copyright (c) 1999-2015 Tensilica Inc.
45 /*----------------------------------------------------------------------
47 ----------------------------------------------------------------------*/
49 #define XCHAL_HAVE_BE 1 /* big-endian byte ordering */
51 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */
55 #define XCHAL_HAVE_DENSITY 1 /* 16-bit instructions */
56 #define XCHAL_HAVE_LOOPS 1 /* zero-overhead loops */
57 #define XCHAL_LOOP_BUFFER_SIZE 0 /* zero-ov. loop instr buffer size */
68 #define XCHAL_HAVE_ABSOLUTE_LITERALS 0 /* non-PC-rel (extended) L32R */
[all …]
/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h2 * xtensa/config/core-isa.h -- HAL definitions that are dependent on Xtensa
10 Copyright (c) 1999-2014 Tensilica Inc.
45 /*----------------------------------------------------------------------
47 ----------------------------------------------------------------------*/
49 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */
51 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */
55 #define XCHAL_HAVE_DENSITY 1 /* 16-bit instructions */
56 #define XCHAL_HAVE_LOOPS 1 /* zero-overhead loops */
57 #define XCHAL_LOOP_BUFFER_SIZE 0 /* zero-ov. loop instr buffer size */
67 #define XCHAL_HAVE_ABSOLUTE_LITERALS 0 /* non-PC-rel (extended) L32R */
[all …]
/linux/drivers/usb/musb/
H A Domap2430.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005-2007 by Texas Instruments
20 #include <linux/dma-mapping.h>
41 #define glue_to_musb(g) platform_get_drvdata(g->musb)
50 l = musb_readl(musb->mregs, OTG_FORCESTDBY); in omap2430_low_level_exit()
52 musb_writel(musb->mregs, OTG_FORCESTDBY, l); in omap2430_low_level_exit()
59 l = musb_readl(musb->mregs, OTG_FORCESTDBY); in omap2430_low_level_init()
61 musb_writel(musb->mregs, OTG_FORCESTDBY, l); in omap2430_low_level_init()
70 return -EPROBE_DEFER; in omap2430_musb_mailbox()
72 glue->status = status; in omap2430_musb_mailbox()
[all …]
/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h2 * xtensa/config/core-isa.h -- HAL definitions that are dependent on Xtensa
10 Copyright (c) 1999-2015 Tensilica Inc.
45 /*----------------------------------------------------------------------
47 ----------------------------------------------------------------------*/
49 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */
51 #define XCHAL_NUM_AREGS 32 /* num of physical addr regs */
55 #define XCHAL_HAVE_DENSITY 1 /* 16-bit instructions */
56 #define XCHAL_HAVE_LOOPS 1 /* zero-overhead loops */
57 #define XCHAL_LOOP_BUFFER_SIZE 0 /* zero-ov. loop instr buffer size */
68 #define XCHAL_HAVE_ABSOLUTE_LITERALS 0 /* non-PC-rel (extended) L32R */
[all …]
/linux/drivers/usb/chipidea/
H A Dudc.c1 // SPDX-License-Identifier: GPL-2.0
3 * udc.c - ChipIdea UDC driver
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
13 #include <linux/dma-direct.h>
22 #include <linux/usb/otg-fsm.h>
57 * @num: endpoint number
62 static inline int hw_ep_bit(int num, int dir) in hw_ep_bit() argument
64 return num + ((dir == TX) ? 16 : 0); in hw_ep_bit()
69 int fill = 16 - ci->hw_ep_max / 2; in ep_to_bit()
71 if (n >= ci->hw_ep_max / 2) in ep_to_bit()
[all …]
/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_n.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 /* N-PHY registers. */
18 #define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */
19 #define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */
20 #define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */
21 #define B43_NPHY_BIST_STAT0 B43_PHY_N(0x00E) /* Built-in self test status 0 */
22 #define B43_NPHY_BIST_STAT1 B43_PHY_N(0x00F) /* Built-in self test status 1 */
328 #define B43_NPHY_IQLOCAL_CMDNNUM B43_PHY_N(0x0C1) /* I/Q LO cal command N num */
442 #define B43_NPHY_CRSIT_COCNT_LO B43_PHY_N(0x124) /* CRS idle time CRS-on count (low) */
443 #define B43_NPHY_CRSIT_COCNT_HI B43_PHY_N(0x125) /* CRS idle time CRS-on count (high) */
[all …]

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