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Searched +full:nsp +full:- +full:lcpll0 (Results 1 – 5 of 5) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dbrcm,iproc-clocks.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/brcm,iproc-clocks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ray Jui <rjui@broadcom.com>
11 - Scott Branden <sbranden@broadcom.com>
16 LCPLL0, MIPIPLL, and etc., all derived from an onboard crystal. Each PLL
25 - brcm,bcm63138-armpll
26 - brcm,cygnus-armpll
27 - brcm,cygnus-genpll
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H A Dbrcm,iproc-clocks.txt4 Documentation/devicetree/bindings/clock/clock-bindings.txt
8 LCPLL0, MIPIPLL, and etc., all derived from an onboard crystal. Each PLL
13 - compatible:
14 Should have a value of the form "brcm,<soc>-<pll>". For example, GENPLL on
15 Cygnus has a compatible string of "brcm,cygnus-genpll"
17 - #clock-cells:
20 - reg:
24 - clocks:
28 - clock-output-names:
34 #clock-cells = <0>;
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm5301x.dtsi9 #include "bcm-ns.dtsi"
12 mpcore-bus@19000000 {
14 #clock-cells = <0>;
15 compatible = "brcm,nsp-armpll";
21 compatible = "arm,cortex-a9-twd-wdt";
30 #address-cells = <1>;
31 #size-cell
111 lcpll0: clock-controller@100 { global() label
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H A Dbcm-nsp.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-nsp.h>
38 #address-cells = <1>;
39 #size-cell
485 lcpll0: lcpll0@3f100 { global() label
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dbrcm,cru.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafał Miłecki <rafal@milecki.pl>
20 - enum:
21 - brcm,ns-cru
22 - const: simple-mfd
29 "#address-cells":
32 "#size-cells":
36 '^clock-controller@[a-f0-9]+$':
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