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Searched +full:npcm845 +full:- +full:pinctrl (Results 1 – 3 of 3) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dnuvoton,npcm845-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nuvoton,npcm845-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton NPCM845 Pin Controller and GPIO
10 - Tomer Maimon <tmaimon77@gmail.com>
13 The Nuvoton BMC NPCM8XX Pin Controller multi-function routed through
20 const: nuvoton,npcm845-pinctrl
25 '#address-cells':
28 '#size-cells':
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/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dnuvoton,npcm-pspi.txt6 - compatible : "nuvoton,npcm750-pspi" for Poleg NPCM7XX.
7 "nuvoton,npcm845-pspi" for Arbel NPCM8XX.
8 - #address-cells : should be 1. see spi-bus.txt
9 - #size-cells : should be 0. see spi-bus.txt
10 - specifies physical base address and size of the register.
11 - interrupts : contain PSPI interrupt.
12 - clocks : phandle of PSPI reference clock.
13 - clock-names: Should be "clk_apb5".
14 - pinctrl-names : a pinctrl state named "default" must be defined.
15 - pinctrl-0 : phandle referencing pin configuration of the device.
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H A Dnuvoton,npcm-fiu.txt14 - compatible : "nuvoton,npcm750-fiu" for Poleg NPCM7XX BMC
15 "nuvoton,npcm845-fiu" for Arbel NPCM8XX BMC
16 - #address-cells : should be 1.
17 - #size-cells : should be 0.
18 - reg : the first contains the register location and length,
20 - reg-names: Should contain the reg names "control" and "memory"
21 - clocks : phandle of FIU reference clock.
24 - pinctrl-names : a pinctrl state named "default" must be defined.
25 - pinctrl-0 : phandle referencing pin configuration of the device.
28 - nuvoton,spix-mode: enable spix-mode for an expansion bus to an ASIC or CPLD.
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