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Searched +full:npcm750 +full:- +full:reset (Results 1 – 17 of 17) sorted by relevance

/linux/arch/arm64/boot/dts/nuvoton/
H A Dnuvoton-common-npcm8xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/clock/nuvoton,npcm845-clk.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
16 compatible = "simple-bus";
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/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-common-npcm7xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
7 #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <25000000>;
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H A Dnuvoton-npcm750-runbmc-olympus.dts1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
6 #include "nuvoton-npcm750.dtsi"
7 #include "nuvoton-npcm750-runbmc-olympus-pincfg.dtsi"
9 #include <dt-bindings/i2c/i2c.h>
10 #include <dt-bindings/gpio/gpio.h>
13 model = "Nuvoton npcm750 RunBMC Olympus";
14 compatible = "nuvoton,npcm750";
43 stdout-path = &serial3;
50 iio-hwmon {
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H A Dnuvoton-npcm730-gbs.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
10 compatible = "quanta,gbs-bmc","nuvoton,npcm730";
71 stdout-path = &serial0;
78 gpio-keys {
79 compatible = "gpio-keys";
80 sas-cable0 {
81 label = "sas-cable0";
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/linux/Documentation/devicetree/bindings/reset/
H A Dnuvoton,npcm750-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/nuvoton,npcm750-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton NPCM Reset controller
10 - Tomer Maimon <tmaimon77@gmail.com>
15 - nuvoton,npcm750-reset # Poleg NPCM7XX SoC
16 - nuvoton,npcm845-reset # Arbel NPCM8XX SoC
21 '#reset-cells':
24 '#clock-cells':
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/linux/Documentation/devicetree/bindings/iio/adc/
H A Dnuvoton,npcm750-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nuvoton,npcm750-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomer Maimon <tmaimon77@gmail.com>
13 The NPCM7XX ADC is a 10-bit converter and NPCM8XX ADC is a 12-bit converter,
19 - nuvoton,npcm750-adc
20 - nuvoton,npcm845-adc
36 vref-supply:
39 "#io-channel-cells":
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/linux/Documentation/devicetree/bindings/media/
H A Dnuvoton,npcm-ece.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nuvoton,npcm-ece.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Joseph Liu <kwliu@nuvoton.com>
11 - Marvin Lin <kflin@nuvoton.com>
19 - nuvoton,npcm750-ece
20 - nuvoton,npcm845-ece
29 - compatible
30 - reg
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H A Dnuvoton,npcm-vcd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nuvoton,npcm-vcd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Joseph Liu <kwliu@nuvoton.com>
11 - Marvin Lin <kflin@nuvoton.com>
19 - nuvoton,npcm750-vcd
20 - nuvoton,npcm845-vcd
43 memory-region:
49 - compatible
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/linux/Documentation/devicetree/bindings/spi/
H A Dnuvoton,npcm-pspi.txt6 - compatible : "nuvoton,npcm750-pspi" for Poleg NPCM7XX.
7 "nuvoton,npcm845-pspi" for Arbel NPCM8XX.
8 - #address-cells : should be 1. see spi-bus.txt
9 - #size-cells : should be 0. see spi-bus.txt
10 - specifies physical base address and size of the register.
11 - interrupts : contain PSPI interrupt.
12 - clocks : phandle of PSPI reference clock.
13 - clock-names: Should be "clk_apb5".
14 - pinctrl-names : a pinctrl state named "default" must be defined.
15 - pinctrl-0 : phandle referencing pin configuration of the device.
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/linux/drivers/reset/
H A Dreset-npcm.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/reset-controller.h>
20 #include <soc/nuvoton/clock-npcm8xx.h>
40 /* NPCM7xx Reset registers */
109 writel(NPCM_SWRST << rc->sw_reset_number, rc->base + NPCM_SWRSTR); in npcm_rc_restart()
126 spin_lock_irqsave(&rc->lock, flags); in npcm_rc_setclear_reset()
127 stat = readl(rc->base + ctrl_offset); in npcm_rc_setclear_reset()
129 writel(stat | rst_bit, rc->base + ctrl_offset); in npcm_rc_setclear_reset()
131 writel(stat & ~rst_bit, rc->base + ctrl_offset); in npcm_rc_setclear_reset()
132 spin_unlock_irqrestore(&rc->lock, flags); in npcm_rc_setclear_reset()
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/linux/Documentation/devicetree/bindings/usb/
H A Dgeneric-ehci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ehci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 - $ref: usb-hcd.yaml
14 - if:
19 const: ibm,usb-ehci-440epx
28 - items:
29 - enum:
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/linux/drivers/iio/adc/
H A Dnpcm_adc.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/reset.h>
35 struct reset_control *reset; member
106 regtemp = ioread32(info->regs + NPCM_ADCCON); in npcm_adc_isr()
108 iowrite32(regtemp, info->regs + NPCM_ADCCON); in npcm_adc_isr()
109 wake_up_interruptible(&info->wq); in npcm_adc_isr()
110 info->int_status = true; in npcm_adc_isr()
122 regtemp = ioread32(info->regs + NPCM_ADCCON); in npcm_adc_read()
124 info->int_status = false; in npcm_adc_read()
126 NPCM_ADCCON_ADC_CONV, info->regs + NPCM_ADCCON); in npcm_adc_read()
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/linux/drivers/peci/controller/
H A Dpeci-npcm.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/reset.h>
31 /* NPCM_PECI_CTL_STS - 0x00 : Control Register */
38 /* NPCM_PECI_RD_LENGTH - 0x04 : Command Register */
41 /* NPCM_PECI_CMD - 0x10 : Command Register */
44 /* NPCM_PECI_WR_LENGTH - 0x1C : Command Register */
47 /* NPCM_PECI_PDDR - 0x2C : Command Register */
75 struct npcm_peci *priv = dev_get_drvdata(controller->dev.parent); in npcm_peci_xfer()
76 unsigned long timeout = msecs_to_jiffies(priv->cmd_timeout_ms); in npcm_peci_xfer()
82 ret = regmap_read_poll_timeout(priv->regmap, NPCM_PECI_CTL_STS, cmd_sts, in npcm_peci_xfer()
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/linux/drivers/tty/serial/8250/
H A D8250_of.c1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/reset.h>
54 return DIV_ROUND_CLOSEST(port->uartclk, 16 * baud + 2) - 2; in npcm_get_divisor()
59 port->get_divisor = npcm_get_divisor; in npcm_setup()
60 port->startup = npcm_startup; in npcm_setup()
73 struct uart_8250_port *port8250 = serial8250_get_port(info->line); in of_platform_serial_clk_notifier_cb()
77 serial8250_update_uartclk(&port8250->port, ndata->new_rate); in of_platform_serial_clk_notifier_cb()
92 struct device *dev = &ofdev->dev; in of_platform_serial_setup()
93 struct device_node *np = dev->of_node; in of_platform_serial_setup()
94 struct uart_port *port = &up->port; in of_platform_serial_setup()
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/linux/drivers/hwmon/
H A Dnpcm750-pwm-fan.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2014-2018 Nuvoton Technology corporation.
7 #include <linux/hwmon-sysfs.h>
150 * 320RPM/pulse 2, ...-- 10.6Hz)
154 #define NPCM7XX_FAN_TCPA (NPCM7XX_FAN_TCNT - NPCM7XX_FAN_TIMEOUT)
155 #define NPCM7XX_FAN_TCPB (NPCM7XX_FAN_TCNT - NPCM7XX_FAN_TIMEOUT)
224 mutex_lock(&data->pwm_lock[module]); in npcm7xx_pwm_config_set()
227 iowrite32(val, NPCM7XX_PWM_REG_CMRx(data->pwm_base, module, pwm_ch)); in npcm7xx_pwm_config_set()
228 tmp_buf = ioread32(NPCM7XX_PWM_REG_CR(data->pwm_base, module)); in npcm7xx_pwm_config_set()
248 mutex_unlock(&data->pwm_lock[module]); in npcm7xx_pwm_config_set()
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/linux/drivers/i2c/busses/
H A Di2c-npcm7xx.c1 // SPDX-License-Identifier: GPL-2.0
125 #define NPCM_I2CTXF_CTL 0x12 /* Tx-FIFO Control */
128 #define NPCM_I2CTXF_STS 0x1A /* Tx-FIFO Status */
129 #define NPCM_I2CRXF_STS 0x1C /* Rx-FIFO Status */
130 #define NPCM_I2CRXF_CTL 0x1E /* Rx-FIFO Control */
602 u8 i2cctl3 = ioread8(bus->reg + NPCM_I2CCTL3); in npcm_i2c_select_bank()
608 iowrite8(i2cctl3, bus->reg + NPCM_I2CCTL3); in npcm_i2c_select_bank()
613 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_init_params()
614 bus->rd_size = 0; in npcm_i2c_init_params()
615 bus->wr_size = 0; in npcm_i2c_init_params()
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/linux/drivers/watchdog/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 on-line as fast as possible after a lock-up. There's both a watchdog
21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source.
51 bool "Update boot-enabled watchdog until userspace takes over"
77 bool "Enable watchdog hrtimer-based pretimeouts"
178 to toggle reset line if SoC fails to ping watchdog via GPIO.
190 configured to only generate IRQ or to trigger system reset via reset
198 tristate "ChromeOS EC-based watchdog"
214 cause system reset.
252 tristate "Watchdog device controlled through GPIO-line"
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