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Searched +full:npcm750 +full:- +full:reset (Results 1 – 10 of 10) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm64/nuvoton/
H A Dnuvoton-common-npcm8xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/clock/nuvoton,npcm845-clk.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/interrupt-controlle
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/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dnuvoton,npcm750-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/nuvoton,npcm750-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton NPCM Reset controller
10 - Tomer Maimon <tmaimon77@gmail.com>
15 - nuvoton,npcm750-reset # Poleg NPCM7XX SoC
16 - nuvoton,npcm845-reset # Arbel NPCM8XX SoC
21 '#reset-cells':
28 nuvoton,sw-reset-number:
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H A Dnuvoton,npcm-reset.txt1 Nuvoton NPCM Reset controller
4 - compatible : "nuvoton,npcm750-reset" for NPCM7XX BMC
5 - reg : specifies physical base address and size of the register.
6 - #reset-cells: must be set to 2
9 - nuvoton,sw-reset-number - Contains the software reset number to restart the SoC.
10 NPCM7xx contain four software reset that represent numbers 1 to 4.
12 If 'nuvoton,sw-reset-number' is not specified software reset is disabled.
16 compatible = "nuvoton,npcm750-reset";
18 #reset-cells = <2>;
19 nuvoton,sw-reset-number = <2>;
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/freebsd/sys/contrib/device-tree/src/arm/nuvoton/
H A Dnuvoton-common-npcm7xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
7 #include <dt-bindings/reset/nuvoto
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H A Dnuvoton-npcm750-runbmc-olympus.dts1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
6 #include "nuvoton-npcm750.dtsi"
7 #include "nuvoton-npcm750-runbmc-olympu
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H A Dnuvoton-npcm730-gbs.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
10 compatible = "quanta,gbs-bmc","nuvoton,npcm730";
71 stdout-path = &serial0;
78 gpio-keys {
79 compatible = "gpio-key
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/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dnuvoton,npcm750-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nuvoton,npcm750-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomer Maimon <tmaimon77@gmail.com>
13 The NPCM7XX ADC is a 10-bit converter and NPCM8XX ADC is a 12-bit converter,
19 - nuvoton,npcm750-adc
20 - nuvoton,npcm845-adc
36 vref-supply:
39 "#io-channel-cells":
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H A Dnuvoton,npcm-adc.txt3 The NPCM ADC is a 10-bit converter for eight channel inputs.
6 - compatible: "nuvoton,npcm750-adc" for the NPCM7XX BMC.
7 - reg: specifies physical base address and size of the registers.
8 - interrupts: Contain the ADC interrupt with flags for falling edge.
9 - resets : phandle to the reset control for this device.
12 - clocks: phandle of ADC reference clock, in case the clock is not
14 - vref-supply: The regulator supply ADC reference voltage, in case the
15 vref-supply is not added the ADC will use internal voltage
21 compatible = "nuvoton,npcm750-adc";
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dnuvoton,npcm-pspi.txt6 - compatible : "nuvoton,npcm750-pspi" for Poleg NPCM7XX.
7 "nuvoton,npcm845-pspi" for Arbel NPCM8XX.
8 - #address-cells : should be 1. see spi-bus.txt
9 - #size-cells : should be 0. see spi-bus.txt
10 - specifies physical base address and size of the register.
11 - interrupts : contain PSPI interrupt.
12 - clocks : phandle of PSPI reference clock.
13 - clock-names: Should be "clk_apb5".
14 - pinctrl-names : a pinctrl state named "default" must be defined.
15 - pinctrl-0 : phandle referencing pin configuration of the device.
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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dgeneric-ehci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ehci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartma
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