| /linux/Documentation/arch/x86/ |
| H A D | microcode.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 :Authors: - Fenghua Yu <fenghua.yu@intel.com>
8 - Borislav Petkov <bp@suse.de>
9 - Ashok Raj <ashok.raj@intel.com>
13 updating the microcode on platforms beyond the OEM End-Of-Life support,
14 and updating the microcode on long-running systems without rebooting.
39 During BSP (BootStrapping Processor) boot (pre-SMP), the kernel
56 if [ -z "$1" ]; then
66 rm -rf $TMPDIR
70 mkdir -p $DSTDIR
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| H A D | kernel-stacks.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 Kernel stacks on x86-64 bit
37 per CPU interrupt nest counter. This is needed because x86-64 "IST"
48 An IST is selected by a non-zero value in the IST field of an
49 interrupt-gate descriptor. When an interrupt occurs and the hardware
53 will switch back to the per-thread stack. If software wants to allow
70 Used for interrupt 8 - Double Fault Exception (#DF).
79 Used for non-maskable interrupts (NMI).
102 Used for interrupt 18 - Machine Check Exception (#MC).
119 Adapted from Ingo's mail, Message-ID: <20150521101614.GA10889@gmail.com>:
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| H A D | pti.rst | 1 .. SPDX-License-Identifier: GPL-2.0
27 This approach helps to ensure that side-channel attacks leveraging
30 time. Once enabled at compile-time, it can be disabled at boot with
31 the 'nopti' or 'pti=' kernel parameters (see kernel-parameters.txt).
43 that any missed kernel->user CR3 switch will immediately crash
49 each CPU's copy of the area a compile-time-fixed virtual address.
65 Protection against side-channel attacks is important. But,
70 a. Each process now needs an order-1 PGD instead of order-0.
104 are created by copying top-level (PGD) entries into each
109 f. In addition to the fork()-time copying, there must also
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| /linux/drivers/acpi/arm64/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
17 a standard that enables issuing a non-maskable diagnostic dump and
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| /linux/arch/m68k/mac/ |
| H A D | macints.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * exclusively use the autovector interrupts (the 'generic level0-level7'
8 * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
10 * 1 - VIA1
11 * - slot 0: one second interrupt (CA2)
12 * - slot 1: VBlank (CA1)
13 * - slot 2: ADB data ready (SR full)
14 * - slot 3: ADB data (CB2)
15 * - slot 4: ADB clock (CB1)
16 * - slot 5: timer 2
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| /linux/Documentation/virt/kvm/devices/ |
| H A D | s390_flic.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 FLIC handles floating (non per-cpu) interrupts, i.e. I/O, service and some
8 machine check interruptions. All interrupts are stored in a per-vm list of
14 - add interrupts (KVM_DEV_FLIC_ENQUEUE)
15 - inspect currently pending interrupts (KVM_FLIC_GET_ALL_IRQS)
16 - purge all pending floating interrupts (KVM_DEV_FLIC_CLEAR_IRQS)
17 - purge one pending floating I/O interrupt (KVM_DEV_FLIC_CLEAR_IO_IRQ)
18 - enable/disable for the guest transparent async page faults
19 - register and modify adapter interrupt sources (KVM_DEV_FLIC_ADAPTER_*)
20 - modify AIS (adapter-interruption-suppression) mode state (KVM_DEV_FLIC_AISM)
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| /linux/arch/x86/include/asm/ |
| H A D | trapnr.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Event type codes used by FRED, Intel VT-x and AMD SVM
15 #define EVENT_TYPE_OTHER 7 // FRED SYSCALL/SYSENTER, VT-x MTF
19 #define X86_TRAP_DE 0 /* Divide-by-zero */
21 #define X86_TRAP_NMI 2 /* Non-maskable Interrupt */
35 #define X86_TRAP_MF 16 /* x87 Floating-Point Exception */
38 #define X86_TRAP_XF 19 /* SIMD Floating-Point Exception */
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| /linux/Documentation/core-api/irq/ |
| H A D | irqflags-tracing.rst | 2 IRQ-flags state tracing
7 The "irq-flags tracing" feature "traces" hardirq and softirq state, in
9 every hardirqs-off/hardirqs-on, softirqs-off/softirqs-on event that
15 CONFIG_PROVE_RWSEM_LOCKING will be offered on an architecture - these
20 category, because lots of lowlevel assembly code deal with irq-flags
21 state changes. But an architecture can be irq-flags-tracing enabled in a
22 rather straightforward and risk-free manner.
25 code-organizational changes first:
27 - add and enable TRACE_IRQFLAGS_SUPPORT in their arch level Kconfig file
30 irq-flags-tracing support:
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| /linux/arch/mips/include/asm/mach-rc32434/ |
| H A D | gpio.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
36 u32 gpionmien; /* GPIO Non-maskable Interrupt Enable Register */
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| /linux/arch/x86/kernel/apic/ |
| H A D | msi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
31 irq_data_get_irq_chip(irqd)->irq_write_msi_msg(irqd, msg); in irq_msi_update_msg()
38 struct irq_data *parent = irqd->parent_data; in msi_set_affinity()
47 ret = parent->chip->irq_set_affinity(parent, mask, force); in msi_set_affinity()
52 * For non-maskable and non-remapped MSI interrupts the migration in msi_set_affinity()
55 * caused by the non-atomic update of the address/data pair. in msi_set_affinity()
58 * - The MSI is maskable (remapped MSI does not use this code path). in msi_set_affinity()
60 * - The new vector is the same as the old vector in msi_set_affinity()
61 * - The old vector is MANAGED_IRQ_SHUTDOWN_VECTOR (interrupt starts up) in msi_set_affinity()
62 * - The interrupt is not yet started up in msi_set_affinity()
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| /linux/Documentation/trace/rv/ |
| H A D | monitor_rtapp.rst | 1 Real-time application monitors
4 - Name: rtapp
5 - Type: container for multiple monitors
6 - Author: Nam Cao <namcao@linutronix.de>
9 -----------
11 Real-time applications may have design flaws such that they experience
15 - Page faults: A real-time thread may access memory that does not have a
16 mapped physical backing or must first be copied (such as for copy-on-write).
18 action. This causes significant delays to the real-time thread
19 - Priority inversion: A real-time thread blocks waiting for a lower-priority
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| /linux/Documentation/translations/zh_CN/core-api/ |
| H A D | local_ops.rst | 1 .. include:: ../disclaimer-zh_CN.rst
3 :Original: Documentation/core-api/local_ops.rst
37 断处理程序，它允许在NMI（Non Maskable Interrupt）处理程序中使用连贯的计数器。
51 UP之间没有不同的行为，在你的架构的 ``local.h`` 中包括 ``asm-generic/local.h``
76 以确保它在-rt内核上仍能正确工作。
133 /* test-local.c
150 /* Increment the counter from a non preemptible context */
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| /linux/arch/sparc/include/asm/ |
| H A D | head_32.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
29 * the same generic system call low-level entry point. The trap table
30 * entry sequences are also HyperSparc pipeline friendly ;-)
69 /* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and
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| /linux/Documentation/dev-tools/ |
| H A D | gpio-sloppy-logic-analyzer.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 This document briefly describes how to run the GPIO based in-kernel sloppy
22 Another feature is to snoop on on-chip peripherals if the I/O cells of these
26 control subsystem such pin controllers are called "non-strict": a certain pin
31 non-deterministic code paths and non-maskable interrupts. It is called 'sloppy'
47 i2c-analyzer {
48 compatible = "gpio-sloppy-logic-analyzer";
49 probe-gpios = <&gpio6 21 GPIO_OPEN_DRAIN>, <&gpio6 4 GPIO_OPEN_DRAIN>;
50 probe-names = "SCL", "SDA";
62 ``tools/gpio/gpio-sloppy-logic-analyzer``. Besides checking parameters more
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| /linux/arch/m68k/virt/ |
| H A D | ints.c | 1 // SPDX-License-Identifier: GPL-2.0
34 * 6 goldfish-pic for CPU IRQ #1 to IRQ #6
35 * CPU IRQ #1 -> PIC #1
36 * IRQ #1 to IRQ #31 -> unused
37 * IRQ #32 -> goldfish-tty
38 * CPU IRQ #2 -> PIC #2
39 * IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32
40 * CPU IRQ #3 -> PIC #3
41 * IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64
42 * CPU IRQ #4 -> PIC #4
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| /linux/Documentation/RCU/ |
| H A D | NMI-RCU.rst | 7 Although RCU is usually used to protect read-mostly data structures,
8 it is possible to use RCU to provide dynamic non-maskable interrupt
10 how to do this, drawing loosely from Zwane Mwaikambo's NMI-timer
23 the NMI handler to take the default machine-specific action::
46 in the same way that a hardware irq would, then increments the per-CPU
49 default_do_nmi() function to handle a machine-specific NMI. Finally,
59 …eference_sched() be necessary on Alpha, given that the code referenced by the pointer is read-only?
71 data that is to be used by the callback must be initialized up -before-
95 CPUs complete any preemption-disabled segments of code that they were
107 …eference_sched() be necessary on Alpha, given that the code referenced by the pointer is read-only?
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| /linux/Documentation/tools/rtla/ |
| H A D | rtla-hwnoise.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 rtla-hwnoise
6 ------------------------------------------
7 Detect and quantify hardware-related noise
8 ------------------------------------------
22 of threads as a consequence, only non-maskable interrupts and hardware-related
38 In the example below, the **rtla hwnoise** tool is set to run on CPUs *1-7*
39 on a system with 8 cores/16 threads with hyper-threading enabled.
45 # rtla hwnoise -c 1-7 -T 1 -d 10m -q
46 Hardware-related Noise
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| /linux/arch/sh/kernel/ |
| H A D | traps.c | 1 // SPDX-License-Identifier: GPL-2.0
39 printk("Process: %s (pid: %d, stack limit = %p)\n", current->comm, in die()
43 dump_mem("Stack: ", KERN_DEFAULT, regs->regs[15], in die()
73 * - userspace errors just cause EFAULT to be returned, resulting in SEGV
74 * - kernel/userspace interfaces cause a jump to an appropriate handler
75 * - other kernel errors are bad
81 fixup = search_exception_tables(regs->pc); in die_if_no_fixup()
83 regs->pc = fixup->fixup; in die_if_no_fixup()
95 unsigned long bugaddr = regs->pc; in handle_BUG()
104 if (bug->flags & BUGFLAG_UNWINDER) in handle_BUG()
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| /linux/arch/xtensa/kernel/ |
| H A D | irq.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Xtensa built-in interrupt controller and some generic functions copied
8 * Copyright (C) 2002 - 2013 Tensilica, Inc.
23 #include <linux/irqchip/xtensa-mx.h>
24 #include <linux/irqchip/xtensa-pic.h>
42 sp &= THREAD_SIZE - 1; in do_IRQ()
46 sp - sizeof(struct thread_info)); in do_IRQ()
62 seq_puts(p, " Non-maskable interrupts\n"); in arch_show_interrupts()
72 return -EINVAL; in xtensa_irq_domain_xlate()
78 return -EINVAL; in xtensa_irq_domain_xlate()
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| /linux/Documentation/core-api/ |
| H A D | timekeeping.rst | 10 ------------------------------
60 -----------------------------------------
92 Return a coarse-grained version of the time as a scalar
98 -------------------------
117 These are quicker than the non-coarse versions, but less accurate,
139 a non-maskable interrupt (NMI) during a timekeeper update, and
146 --------------------------
149 but may appear in third-party drivers being ported here. In particular,
151 been replaced because the tv_sec member overflows in year 2038 on 32-bit
174 coarse-grained times can use the simple 'jiffies' instead, while
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| /linux/arch/m68k/ifpsp060/src/ |
| H A D | ftest.S | 3 M68000 Hi-Performance Microprocessor Division
5 Production Release P1.00 -- October 10, 1994
30 set SREGS, -64
31 set IREGS, -128
32 set IFPREGS, -224
33 set SFPREGS, -320
34 set IFPCREGS, -332
35 set SFPCREGS, -344
36 set ICCR, -346
37 set SCCR, -348
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| /linux/arch/sparc/include/uapi/asm/ |
| H A D | traps.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
27 (0x10800000 | (((dest_addr-inst_addr)>>2)&0x3fffff))
60 #define SP_TRAP_IRQ15 0x1f /* IRQ level 15 Non-maskable */
63 #define SP_TRAP_CPDIS 0x24 /* Co-Processor Disabled */
65 #define SP_TRAP_CPEXP 0x28 /* Co-Processor Exception */
75 #define SP_TRAP_SDIVZ 0x82 /* Software Divide-by-Zero trap */
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| /linux/arch/xtensa/variants/dc232b/include/variant/ |
| H A D | core.h | 8 * Copyright (c) 1999-2007 Tensilica Inc.
25 /*----------------------------------------------------------------------
27 ----------------------------------------------------------------------*/
29 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */
35 #define XCHAL_HAVE_DENSITY 1 /* 16-bit instructions */
36 #define XCHAL_HAVE_LOOPS 1 /* zero-overhead loops */
46 #define XCHAL_HAVE_ABSOLUTE_LITERALS 1 /* non-PC-rel (extended) L32R */
68 #define XCHAL_HAVE_VECTORFPU2005 0 /* vector floating-point pkg */
75 /*----------------------------------------------------------------------
77 ----------------------------------------------------------------------*/
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | cwsr_trap_handler_gfx12.asm | 26 * cpp -DASIC_FAMILY=CHIP_GFX12 cwsr_trap_handler_gfx12.asm -P -o gfx12.sp3
27 * sp3 gfx12.sp3 -hex gfx12.hex
78 var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_2_SIZE = SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_SHIFT - SQ_WAVE_E…
80 var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_3_SIZE = 32 - SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_3_SHIFT
191 // Let second-level handle non-SAVECTX exception or trap.
192 // Any concurrent SAVECTX will be handled upon re-entry once halted.
194 // Check non-maskable exceptions. memory_violation, illegal_instruction
200 // Check for maskable exceptions in trapsts.excp and trapsts.excp_hi.
201 // Maskable exceptions only cause the wave to enter the trap handler if
220 // Second-level trap will halt wave and RFE, re-entering for SAVECTX.
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| /linux/arch/powerpc/platforms/pseries/ |
| H A D | ras.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
114 switch (mlog->error_type) { in rtas_mc_error_sub_type()
116 return (mlog->sub_err_type & 0x07); in rtas_mc_error_sub_type()
120 return (mlog->sub_err_type & 0x03); in rtas_mc_error_sub_type()
122 return (mlog->sub_err_type & 0x70) >> 4; in rtas_mc_error_sub_type()
138 np = of_find_node_by_path("/event-sources/hot-plug-events"); in init_ras_hotplug_IRQ()
161 np = of_find_node_by_path("/event-sources/internal-errors"); in init_ras_IRQ()
169 np = of_find_node_by_path("/event-sources/epow-events"); in init_ras_IRQ()
242 epow_log = (struct epow_errorlog *)pseries_log->data; in rtas_parse_epow_errlog()
243 action_code = epow_log->sensor_value & 0xF; /* bottom 4 bits */ in rtas_parse_epow_errlog()
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