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/freebsd/share/man/man3/
H A Dbitstring.382 .Nd bit-string manipulation functions and macros
169 clear or set the zero-based numbered bit
179 set or clear the zero-based numbered bits from
189 evaluates to non-zero if the zero-based numbered bit
198 evaluates to non-zero if the zero-based numbered bits from
211 the zero-based number of the first bit not set in the array of
217 is set to \-1.
224 the zero-based number of the first bit set in the array of
230 is set to \-1.
236 the zero-based number of the first bit not set in the array of
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGRecordLayout.h1 //===--- CGRecordLayout.h - LLVM Record Layout Information ------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
27 /// Often we layout a sequence of bitfields as a contiguous sequence of bits.
34 /// into a single integer of that size (i24 or i40 -- may not be power-of-two
38 /// The CGRecordLayout also has a field index which encodes which byte-sequence
49 /// bitfield, and the second is the padding out to a 4-byte alignment.
66 /// The offset within a contiguous run of bitfields that are represented as
70 /// The total size of the bit-field, in bits.
73 /// Whether the bit-field is signed.
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/freebsd/contrib/llvm-project/lld/docs/ELF/
H A Dlinker_script.rst47 section-command
48 section-command
52 Each section-command can be a symbol assignment, an output section description,
61 command is followed by ``INSERT``, LLD applies built-in rules which are similar
64 - Align the first section in a ``PT_LOAD`` segment according to
65 ``-z noseparate-code``, ``-z separate-code``, or
66 ``-z separate-loadable-segments``
67 - Define ``__bss_start``, ``end``, ``_end``, ``etext``, ``_etext``, ``edata``,
69 - Sort ``.ctors.*``/``.dtors.*``/``.init_array.*``/``.fini_array.*`` and
71 - Place input ``.text.*`` into output ``.text``, and handle certain variants
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNNSAReassign.cpp1 //===-- GCNNSAReassign.cpp - Reassign registers in NSA instructions -------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// \brief Try to reassign registers on GFX10+ from non-sequential to sequential
14 //===----------------------------------------------------------------------===//
29 #define DEBUG_TYPE "amdgpu-nsa-reassign"
32 "Number of NSA instructions with non-sequential address found");
62 NON_CONTIGUOUS, // NSA with non-sequential address which we can try
64 CONTIGUOUS // NSA with all sequential address registers
114 if (VRM->hasPhys(Intervals[N]->reg())) in tryAssignRegisters()
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/freebsd/share/man/man9/
H A Dcrypto_buffer.9128 invokes a caller-supplied function
150 returns a non-zero value,
166 attempts to locate a single, virtually-contiguous segment of the data buffer
179 attempts to locate a single, virtually-contiguous segment in the input data
189 .Bl -tag -width " CRYPTO_BUF_CONTIG"
213 The structure also contains the following type-specific fields:
214 .Bl -tag -width " cb_vm_page_offset"
298 returns the start of the virtually-contiguous segment at the current position of
306 return the return value from the caller-supplied callback function.
312 return a pointer to a contiguous segment or
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H A Dcopy.965 functions are designed to copy contiguous data from one address space
80 bytes of data from the user-space address
82 to the kernel-space address
91 bytes of data from the kernel-space address
93 to the user-space address
100 functions require that the kernel-space and user-space data be
108 function copies a NUL-terminated string, at most
110 bytes long, from kernel-space address
112 to kernel-space address
120 .No non- Ns Dv NULL ) .
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/freebsd/lib/libpmc/pmu-events/arch/arm64/
H A Dcommon-and-microarch.json129 "PublicDescription": "Attributable Level 1 data cache write-back",
132 "BriefDescription": "Attributable Level 1 data cache write-back"
147 "PublicDescription": "Attributable Level 2 data cache write-back",
150 "BriefDescription": "Attributable Level 2 data cache write-back"
273 "PublicDescription": "Access to another socket in a multi-socket system",
276 "BriefDescription": "Access to another socket in a multi-socket system"
303 … "PublicDescription": "Attributable memory read access to another socket in a multi-socket system",
306 … "BriefDescription": "Attributable memory read access to another socket in a multi-socket system"
309 …"PublicDescription": "Level 1 data cache long-latency read miss. The counter counts each memory r…
312 "BriefDescription": "Level 1 data cache long-latency read miss"
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/freebsd/sys/dev/ice/
H A Dice_resmgr.c1 /* SPDX-License-Identifier: BSD-3-Clause */
39 * It can handle contiguous and scattered resource allocations, and upon
41 * resource IDs to PF-space resource indices.
52 MALLOC_DEFINE(M_ICE_RESMGR, "ice-resmgr", "Intel(R) 100Gb Network Driver resmgr allocations");
59 * ice_resmgr_init - Initialize a resource manager structure
71 resmgr->resources = bit_alloc(num_res, M_ICE_RESMGR, M_NOWAIT); in ice_resmgr_init()
72 if (resmgr->resource in ice_resmgr_init()
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/freebsd/sys/contrib/openzfs/man/man4/
H A Dspl.45 .\" usr/src/OPENSOLARIS.LICENSE or https://opensource.org/licenses/CDDL-1.0.
26 .Bl -tag -width Ds
41 .It Sy spl_kmem_cache_max_size Ns = Ns Sy 32 Po 64-bit Pc or Sy 4 Po 32-bit Pc Pq uint
66 preferably just a few pages, since they must by physically contiguous.
87 should still be avoided due to the expense of locating a contiguous range
102 They do this by keeping a per-cpu cache of recently
113 Otherwise magazines will be limited to 2-256 objects per magazine (i.e per cpu).
119 It can be explicitly enabled by placing a unique non-zero value in
124 This value may be overridden for non-standard configurations.
130 Set to a non-zero value to enable.
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/freebsd/contrib/elftoolchain/libdwarf/
H A Ddwarf_get_ranges.325 .\" $Id: dwarf_get_ranges.3 3644 2018-10-15 19:55:01Z jkoshy $
32 .Nd retrieve non-contiguous address ranges
59 retrieves information about the non-contiguous address ranges associated
117 .Bl -tag -width ".Va dwr_addr1"
126 .Bl -tag -width ".Dv DW_RANGES_ENTRY" -compact
178 .Bd -literal -offset indent
244 .Bl -tag -width ".Bq Er DW_DLE_NO_ENTRY"
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Darm,coresight-catu.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-catu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
26 translates contiguous Virtual Addresses (VAs) from an AXI master into
27 non-contiguous Physical Addresses (PAs) that are intended for system memory.
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/freebsd/tools/tools/ioat/
H A Dioatcontrol.846 .Ar [ chain-len
64 .Bl -tag -width Ds
69 Test contiguous 8k copy.
71 Test non-contiguous 8k copy.
94 .Bl -tag -width Ds
140 .Ar chain-len
/freebsd/contrib/elftoolchain/strings/
H A Dstrings.125 .\" $Id: strings.1 3360 2016-01-24 18:34:06Z jkoshy $
35 .Op Fl a | Fl -all
36 .Op Fl e Ar encoding | Fl -encoding= Ns Ar encoding
37 .Op Fl f | Fl -print-file-name
38 .Op Fl h | Fl -help
39 .Op Fl n Ar number | Fl -bytes= Ns Ar number | Fl Ar number
41 .Op Fl t Ar radix | Fl -radix= Ns Ar radix
42 .Op Fl v | Fl -version
49 utility prints contiguous sequences of printable
62 utility is mainly used for determining the contents of non-text files.
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedA510.td1 //==- AArch64SchedCortexA510.td - ARM Cortex-A510 Scheduling Definitions -*- tablegen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file defines the machine model for the ARM Cortex-A510 processor.
11 //===----------------------------------------------------------------------===//
13 // ===---------------------------------------------------------------------===//
14 // The following definitions describe the per-operand machine model.
17 // Cortex-A510 machine model for scheduling and other instruction cost heuristics.
19 let MicroOpBufferSize = 0; // The Cortex-A510 is an in-order processor
20 let IssueWidth = 3; // It dual-issues under most circumstances
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H A DAArch64SchedNeoverseN2.td1 //=- AArch64SchedNeoverseN2.td - NeoverseN2 Scheduling Defs --*- tablegen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
14 let IssueWidth = 10; // Micro-ops dispatched at a time.
15 let MicroOpBufferSize = 160; // Entries in micro-op re-order buffer.
18 let LoopMicroOpBufferSize = 16; // NOTE: Copied from Cortex-A57.
25 //===----------------------------------------------------------------------===//
27 // Instructions are first fetched and then decoded into internal macro-ops
29 // stages. A MOP can be split into two micro-ops further down the pipeline
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/freebsd/share/man/man4/
H A Dnuma.430 .Nd Non-Uniform Memory Access
35 Non-Uniform Memory Access is a computer architecture design which
46 implements NUMA-aware memory allocation policies.
75 tool is available for starting processes with a non-default
81 Systems with non-uniform access to I/O devices may mark those devices
92 .Bl -tag -width indent -compact
99 A value of -1 means the locality map is not available or no
108 implementation is VM-focused.
111 domains are mapped into a contiguous, non-sparse
126 as a first-touch allocation policy with a fail-over to round-robin allocation
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/freebsd/sys/contrib/zstd/lib/compress/
H A Dzstd_compress_internal.h5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
18 /*-*************************************
31 /*-*************************************
41 … benefit is that ZSTD_DUBT_UNSORTED_MARK cannot be mishandled after table re-use with a different …
45 /*-*************************************
88 * Stores Literals Block Type for a super-block in hType, and
99 * Stores symbol compression modes for a super-block in {ll, ol, ml}Type, and
164 /* All tables are allocated inside cctx->workspace by ZSTD_resetCCtx_internal() */
180 …ZSTD_OptPrice_e priceType; /* prices can be determined dynamically, or follow a pre-defined cost…
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DMergeICmps.cpp1 //===- MergeICmps.cpp - Optimize chains of integer comparisons ------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 // from contiguous memory locations into a shorter chain of larger integer
16 // - There are less jumps, and therefore less opportunities for mispredictions
17 // and I-cache misses.
18 // - Code size is smaller, both because jumps are removed and because the
19 // encoding of a 2*n byte compare is smaller than that of two n-byte
40 // Which will later be expanded (ExpandMemCmp) as a single 8-bytes icmp.
42 //===----------------------------------------------------------------------===//
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/freebsd/sys/contrib/openzfs/module/zstd/lib/compress/
H A Dzstd_compress_internal.h2 * Copyright (c) 2016-2020, Yann Collet, Facebook, Inc.
5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
18 /*-*************************************
32 /*-*************************************
42 … benefit is that ZSTD_DUBT_UNSORTED_MARK cannot be mishandled after table re-use with a different …
46 /*-*************************************
101 /* All tables are allocated inside cctx->workspace by ZSTD_resetCCtx_internal() */
117 …ZSTD_OptPrice_e priceType; /* prices can be determined dynamically, or follow a pre-defined cost…
118 const ZSTD_entropyCTables_t* symbolCosts; /* pre-calculated dictionary statistics */
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/freebsd/lib/libsys/
H A Dshm_open.2157 object is always backed by aligned, physically contiguous chunks of memory.
158 This ensures that the object can be mapped using so-called
169 Largepage shared memory objects behave slightly differently from non-largepage
171 .Bl -bullet -offset indent
188 must be large page size-aligned, and the length of the operation must be a
216 .Bl -tag -offset indent -width SHM_
218 If the (non-blocking) memory allocation fails because there is insufficient free
219 contiguous memory, the kernel will attempt to defragment physical memory and
250 .Bd -literal
283 .Bl -tag -offset indent -width Er
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/freebsd/contrib/ntp/sntp/libevent/include/event2/
H A Dbuffer.h2 * Copyright (c) 2007-2012 Niels Provos and Nick Mathewson
46 - if you already know how much data you are going to add as a result
51 - evbuffer_add_buffer() adds the contents of one buffer to the other
54 - evbuffer_add() and evbuffer_add_buffer() do not mix very well:
58 - For high-performance code, you may want to avoid copying data into and out
69 can be used to force a specified number of bytes to be contiguous. This
72 evbuffer_peek() if you don't require that the memory to be contiguous.
81 #include <event2/event-config.h>
107 that modifies or re-packs the buffer contents may invalidate all
128 direct-access functions.
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/freebsd/contrib/libevent/include/event2/
H A Dbuffer.h2 * Copyright (c) 2007-2012 Niels Provos and Nick Mathewson
46 - if you already know how much data you are going to add as a result
51 - evbuffer_add_buffer() adds the contents of one buffer to the other
54 - evbuffer_add() and evbuffer_add_buffer() do not mix very well:
58 - For high-performance code, you may want to avoid copying data into and out
69 can be used to force a specified number of bytes to be contiguous. This
72 evbuffer_peek() if you don't require that the memory to be contiguous.
81 #include <event2/event-config.h>
107 that modifies or re-packs the buffer contents may invalidate all
128 direct-access functions.
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/freebsd/contrib/libexecinfo/
H A Dbacktrace.375 .Bl -tag -width a -offset indent
89 +0x%tx if non-zero, or nothing if zero.
95 The array of formatted strings is returned as a contiguous memory address which
110 are similar to the non _fd named functions, only instead of returning
111 an array or strings, they print a new-line separated array of strings in
115 .Dv \-1
141 .Bl -enum
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/
H A DRuntimeDyldMachO.h1 //===-- RuntimeDyldMachO.h - Run-time dynamic linker for MC-JIT ---*- C++ -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // MachO support for MC-JIT runtime dynamic linker.
11 //===----------------------------------------------------------------------===//
55 /// This convenience method uses memcpy to extract a contiguous addend (the
59 /// Given a relocation_iterator for a non-scattered relocation, construct a
62 /// For targets/opcodes with simple, contiguous immediates (e.g. X86) the
70 Obj.getRelocation(RI->getRawDataRefImpl()); in getRelocationEntry()
74 uint64_t Offset = RI->getOffset(); in getRelocationEntry()
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/freebsd/sys/dev/nvme/
H A Dnvme_ctrlr_cmd.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (C) 2012-2013 Intel Corporation
42 cmd = &req->cmd; in nvme_ctrlr_cmd_identify_controller()
43 cmd->opc = NVME_OPC_IDENTIFY; in nvme_ctrlr_cmd_identify_controller()
49 cmd->cdw10 = htole32(1); in nvme_ctrlr_cmd_identify_controller()
64 cmd = &req->cmd; in nvme_ctrlr_cmd_identify_namespace()
65 cmd->opc = NVME_OPC_IDENTIFY; in nvme_ctrlr_cmd_identify_namespace()
70 cmd->nsid = htole32(nsid); in nvme_ctrlr_cmd_identify_namespace()
84 cmd = &req->cmd; in nvme_ctrlr_cmd_create_io_cq()
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