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/linux/arch/arm/mach-omap1/
H A Dusb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Platform level USB initialization for FS USB OTG controller on omap1
12 #include <linux/dma-map-ops.h>
15 #include <linux/soc/ti/omap1-io.h>
24 /* These routines should handle the standard chip-specific modes
27 * Some board-*.c files will need to set up additional mux options,
32 * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
33 * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
34 * - 5912 OSK UDC, with *nonstandard* A-to-A cable
35 * - 1510 Innovator UDC with bundled usb0 cable
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-prti6q.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
11 stdout-path = &uart4;
14 reg_3v3: regulator-3v3 {
15 compatible = "regulator-fixed";
16 regulator-name = "3v3";
17 regulator-min-microvolt = <3300000>;
18 regulator-max-microvolt = <3300000>;
21 reg_usb_h1_vbus: regulator-h1-vbus {
[all …]
H A Dimx6q-marsboard.dts2 * Copyright (C) 2016 Sergio Prado (sergio.prado@e-labworks.com)
4 * This file is dual-licensed: you can use it either under the terms
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 /dts-v1/;
44 #include <dt-bindings/gpio/gpio.h>
48 compatible = "embest,imx6q-marsboard", "fsl,imx6q";
55 reg_3p3v: regulator-3p3v {
56 compatible = "regulator-fixed";
57 regulator-name = "3P3V";
58 regulator-min-microvolt = <3300000>;
[all …]
H A Dimx6dl-lanmcu.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
17 stdout-path = &uart4;
20 clock_ksz8081: clock-ksz8081 {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <50000000>;
24 clock-output-names = "enet_ref_pad";
[all …]
H A Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
[all …]
H A Dimx6qdl-apf6dev.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 stdout-path = &uart4;
15 compatible = "pwm-backlight";
17 brightness-levels = <0 4 8 16 32 64 128 255>;
18 default-brightness-level = <0>;
19 power-supply = <&reg_5v>;
23 compatible = "fsl,imx-parallel-display";
[all …]
H A Dimx6qdl-pico.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
9 #include <dt-bindings/gpio/gpio.h>
13 stdout-path = &uart1;
16 reg_2p5v: regulator-2p5v {
17 compatible = "regulator-fixed";
18 regulator-name = "2P5V";
19 regulator-min-microvolt = <2500000>;
20 regulator-max-microvolt = <2500000>;
21 regulator-always-on;
24 reg_3p3v: regulator-3p3v {
[all …]
H A Dimx27-eukrea-cpuimx27.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
18 clk14745600: clk-uart {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <14745600>;
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_fec>;
32 pinctrl-names = "default";
33 pinctrl-0 = <&pinctrl_i2c1>;
[all …]
H A Dimx6ull-myir-mys-6ulx.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/pwm/pwm.h>
12 model = "MYiR MYS-6ULX Single Board Computer";
16 stdout-path = &uart1;
19 reg_vdd_5v: regulator-vdd-5v {
20 compatible = "regulator-fixed";
21 regulator-name = "VDD_5V";
22 regulator-min-microvolt = <5000000>;
[all …]
H A Dimx6ul-var-som-concerto.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Support for Variscite MX6 Concerto Carrier board with the VAR-SOM-MX6UL
10 #include "imx6ul-var-som.dtsi"
11 #include <dt-bindings/leds/common.h>
14 model = "Variscite VAR-SOM-MX6UL Concerto Board";
15 compatible = "variscite,mx6ulconcerto", "variscite,var-som-imx6ul", "fsl,imx6ul";
18 stdout-path = &uart1;
21 gpio-keys {
22 compatible = "gpio-keys";
23 pinctrl-names = "default";
[all …]
H A Dimx6ul-ccimx6ulsbcpro.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
13 #include "imx6ul-ccimx6ulsom.dtsi"
20 compatible = "pwm-backlight";
22 brightness-levels = <0 4 8 16 32 64 128 255>;
23 default-brightness-level = <6>;
29 power-supply = <&ldo4_ext>;
34 remote-endpoint = <&display_out>;
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
9 #include <dt-bindings/power/rk3036-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
H A Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/rv1108-cru.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
15 interrupt-parent = <&gic>;
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3308-sakurapi-rk3308b.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
15 compatible = "sakurapi,rk3308-sakurapi-rk3308b", "rockchip,rk3308";
24 stdout-path = "serial2:1500000n8";
27 vcc5v0_sys: regulator-vcc5v0-sys {
28 compatible = "regulator-fixed";
29 regulator-name = "vcc5v0_sys";
30 regulator-always-on;
31 regulator-boot-on;
[all …]
H A Drk3368-lba3368.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/clock/rockchip,rk808.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/sound/rt5640.h>
25 stdout-path = "serial1:115200n8";
33 adc-key {
34 compatible = "adc-keys";
35 io-channels = <&saradc 1>;
[all …]
H A Drk3562-evb2-v10.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2024-2025 Rockchip Electronics Co., Ltd.
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/rockchip.h>
17 compatible = "rockchip,rk3562-evb2-v10", "rockchip,rk3562";
20 stdout-path = "serial0:1500000n8";
23 adc_keys: adc-keys {
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Drenesas,usb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car generation 3 USB 2.0 PHY
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - items:
16 - enum:
17 - renesas,usb2-phy-r8a77470 # RZ/G1C
18 - renesas,usb2-phy-r9a08g045 # RZ/G3S
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8390-genio-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Author: Chris Chen <chris-qj.chen@mediatek.com>
9 * Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
18 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
19 #include <dt-bindings/spmi/spmi.h>
20 #include <dt-bindings/usb/pd.h>
[all …]
H A Dmt8395-genio-1200-evk.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
16 #include <dt-bindings/spmi/spmi.h>
17 #include <dt-bindings/usb/pd.h>
20 model = "MediaTek Genio 1200 EVK-P1V2-EMMC";
[all …]
/linux/drivers/usb/cdns3/
H A Ddrd.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2018-2020 Cadence.
12 #include <linux/usb/otg.h>
106 /* CDNS_RID - bitmasks */
109 /* CDNS_VID - bitmasks */
112 /* OTGCMD - bitmasks */
117 /* Enable OTG mode. */
119 /* Disable OTG mode */
121 /*"Configure OTG as A-Device. */
123 /*"Configure OTG as A-Device. */
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra124-xusb-padctl.txt7 needed for USB. For the new binding, see ../phy/nvidia,tegra-xusb-padctl.txt.
14 This document defines the device-specific binding for the XUSB pad controller.
16 Refer to pinctrl-bindings.txt in this directory for generic information about
17 pin controller device tree bindings and ../phy/phy-bindings.txt for details on
21 --------------------
22 - compatible: For Tegra124, must contain "nvidia,tegra124-xusb-padctl".
23 Otherwise, must contain '"nvidia,<chip>-xusb-padctl",
24 "nvidia-tegra124-xusb-padctl"', where <chip> is tegra132 or tegra210.
25 - reg: Physical base address and length of the controller's registers.
26 - resets: Must contain an entry for each entry in reset-names.
[all …]
/linux/arch/arm64/boot/dts/exynos/google/
H A Dgs101-pixel-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree nodes common for all GS101-based Pixel
5 * Copyright 2021-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/usb/pd.h>
14 #include "gs101-pinctrl.h"
25 stdout-path = &serial_0;
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-sniper.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015-2016 Paul Kocialkowski <contact@paulk.fr>
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
12 compatible = "lg,omap3-sniper", "ti,omap3630", "ti,omap3";
16 cpu0-supply = <&vcc>;
27 pinctrl-names = "default";
29 uart3_pins: uart3-pins {
30 pinctrl-single,pins = <
36 dp3t_sel_pins: dp3t-sel-pins {
[all …]
/linux/include/linux/usb/
H A Dchipidea.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 #include <linux/usb/otg.h>
15 * struct ci_hdrc_cable - structure for external connector cable state tracking
51 * but otg is not supported (no register otgsc).
91 /* pins */
97 /* platform-specific hooks */
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos2200-g0s.dts1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Samsung Galaxy S22+ (g0s/SM-S906B) device tree source
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "Samsung Galaxy S22+ (SM-S906B)";
17 chassis-type = "handset";
20 #address-cells = <2>;
21 #size-cells = <2>;
[all …]

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