/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap3-beagle-ab4.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 4 #include "omap3-beagle.dts" 8 compatible = "ti,omap3-beagle-ab4", "ti,omap3-beagle", "ti,omap3430", "ti,omap3"; 21 /* Unusable as clockevent because of unreliable oscillator, allow to idle */ 23 /delete-property/ti,no-reset-on-init; 24 /delete-property/ti,no-idle; 26 /delete-property/ti,timer-alwon; 30 /* Preferred always-on timer for clocksource */ 32 ti,no-reset-on-init; [all …]
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H A D | am3517.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 11 /delete-node/ &aes1_target; 12 /delete-node/ &aes2_target; 23 /* Based on OMAP3630 variants OPP50 and OPP100 */ 24 operating-points-v2 = <&cpu0_opp_table>; 26 clock-latency = <300000>; /* From legacy driver */ 30 cpu0_opp_table: opp-table { 31 compatible = "operating-points-v2-ti-cpu"; 38 opp-50-300000000 { [all …]
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H A D | omap3-devkit8000-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/input/input.h> 16 compatible = "gpio-leds"; 18 led-heartbeat { 20 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* 186 -> LED1 */ 21 default-state = "on"; 22 linux,default-trigger = "heartbeat"; 25 led-mmc { 27 gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 -> LED2 */ 28 default-state = "on"; [all …]
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H A D | am33xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/pinctrl/am33xx.h> 11 #include <dt-bindings/clock/am3.h> 15 interrupt-parent = <&intc>; 16 #address-cells = <1>; 17 #size-cells = <1>; 30 d-can0 = &dcan0; [all …]
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/linux/Documentation/devicetree/bindings/arm/omap/ |
H A D | omap.txt | 5 On top of that an omap_device is created to extend the platform_device 11 to move data from hwmod to device-tree representation. 15 - compatible: Every devices present in OMAP SoC should be in the 17 - ti,hwmods: list of hwmod names (ascii strings), that comes from the OMAP 22 - ti,no_idle_on_suspend: When present, it prevents the PM to idle the module 24 - ti,no-reset-on-init: When present, the module should not be reset at init 25 - ti,no-idle-on-init: When present, the module should not be idled at init 26 - ti,no-idle: When present, the module is never allowed to idle. 31 compatible = "ti,omap4-spinlock"; 37 - General Purpose devices [all …]
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/linux/Documentation/devicetree/bindings/bus/ |
H A D | ti-sysc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/ti-sysc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 22 module clocks, idle modes and interconnect level resets. 31 pattern: "^target-module(@[0-9a-f]+)?$" 35 - items: 36 - enum: 37 - ti,sysc-omap2 [all …]
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/linux/arch/arm/kernel/ |
H A D | cpuidle.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 18 * arm_cpuidle_simple_enter() - a wrapper to cpu_do_idle() 37 * arm_cpuidle_suspend() - function to enter low power idle states 41 * registered at the init time. 53 * arm_cpuidle_get_ops() - find a registered cpuidle_ops by name 65 for (; m->method; m++) in arm_cpuidle_get_ops() 66 if (!strcmp(m->method, method)) in arm_cpuidle_get_ops() 67 return m->ops; in arm_cpuidle_get_ops() 73 * arm_cpuidle_read_ops() - Initialize the cpuidle ops with the device tree 77 * Get the method name defined in the 'enable-method' property, retrieve the [all …]
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/linux/arch/arm/mach-omap1/ |
H A D | clock_data.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/arch/arm/mach-omap1/clock_data.c 5 * Copyright (C) 2004 - 2005, 2009-2010 Nokia Corporation 7 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc 10 * - Clocks that are only available on some chips should be marked with the 11 * chips that they are present on. 18 #include <linux/clk-provider.h> 21 #include <linux/soc/ti/omap1-io.h> 23 #include <asm/mach-types.h> /* for machine_is_* */ 32 /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ [all …]
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/linux/drivers/macintosh/ |
H A D | via-macii.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device driver for the via ADB on (many) Mac II-class machines 5 * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox 13 * 1999-08-02 (jmt) - Initial rewrite for Unified ADB. 14 * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org> 15 * - Big overhaul, should actually work now. 16 * 2006-12-31 Finn Thain - Another overhaul. 24 * ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/ 32 #include <linux/init.h> 39 /* VIA registers - spaced 0x200 bytes apart */ [all …]
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/linux/arch/arm/mach-omap2/ |
H A D | omap_hwmod.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 2009-2011 Nokia Corporation 6 * Copyright (C) 2011-2012 Texas Instruments, Inc. 13 * These headers and macros are used to define OMAP on-chip module 16 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this 20 * - add interconnect error log structures 21 * - init_conn_id_bit (CONNID_BIT_VECTOR) 22 * - implement default hwmod SMS/SDRC flags? 23 * - move Linux-specific data ("non-ROM data") out 29 #include <linux/init.h> [all …]
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H A D | cm_common.c | 1 // SPDX-License-Identifier: GPL-2.0-only 12 #include <linux/init.h> 25 * cm_ll_data: function pointers to SoC-specific implementations of 41 * cm_split_idlest_reg - split CM_IDLEST reg addr into its components 48 * via the @prcm_inst and @idlest_reg_id. Returns -EINVAL upon error, 56 if (!cm_ll_data->split_idlest_reg) { in cm_split_idlest_reg() 57 WARN_ONCE(1, "cm: %s: no low-level function defined\n", in cm_split_idlest_reg() 59 return -EINVAL; in cm_split_idlest_reg() 62 ret = cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst, in cm_split_idlest_reg() 64 *prcm_inst -= cm_base.offset; in cm_split_idlest_reg() [all …]
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H A D | omap_hwmod.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2009-2011 Nokia Corporation 6 * Copyright (C) 2011-2012 Texas Instruments, Inc. 15 * ------------ 21 * TI's documentation, on-chip devices are referred to as "OMAP 26 * Most of the address and data flow between modules is via OCP-based 28 * interconnects that distribute the hardware clock tree, handle idle 30 * various pads or balls on the OMAP package. 32 * OMAP hwmod provides a consistent way to describe the on-chip 36 * to reset, enable, idle, and disable these hardware blocks. And [all …]
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H A D | vc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <linux/init.h> 19 #include "prm-regbits-34xx.h" 20 #include "prm-regbits-44xx.h" 52 * struct omap_vc_channel_cfg - describe the cfg_channel bitfield 81 * On OMAP3+, all VC channels have the above default bitfield 96 /* Default I2C trace length on pcb, 6.3cm. Used for capacitance calculations. */ 101 * omap_vc_config_channel - configure VC channel to PMIC mappings 106 * - i2c slave address (SA) 107 * - voltage configuration address (RAV) [all …]
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/linux/drivers/base/ |
H A D | pinctrl.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2012 ST-Ericsson SA 6 * Written on behalf of Linaro for ST-Ericsson 7 * Based on bits of regulator core, gpio core and clk core 18 * pinctrl_bind_pins() - called by the device core before probe 25 if (dev->of_node_reused) in pinctrl_bind_pins() 28 dev->pins = devm_kzalloc(dev, sizeof(*(dev->pins)), GFP_KERNEL); in pinctrl_bind_pins() 29 if (!dev->pins) in pinctrl_bind_pins() 30 return -ENOMEM; in pinctrl_bind_pins() 32 dev->pins->p = devm_pinctrl_get(dev); in pinctrl_bind_pins() [all …]
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/linux/drivers/cpuidle/ |
H A D | coupled.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * coupled.c - helper functions to enter the same idle state on multiple cpus 23 * On some ARM SMP SoCs (OMAP4460, Tegra 2, and probably more), the 25 * sequencing restrictions (on Tegra 2, cpu 0 must be the last to 26 * power down), or due to HW bugs (on OMAP4460, a cpu powering up 33 * be tightly controlled on both cpus. 37 * which point the coupled state function will be called on all 40 * Once all cpus are ready to enter idle, they are woken by an smp 42 * cpus will find work to do, and choose not to enter idle. A 47 * cpu exits idle, the other cpus will decrement their counter and [all …]
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/linux/arch/arc/kernel/ |
H A D | smp.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 6 * -- Added support for Inter Processor Interrupts 9 * -- Initial Write (Borrowed heavily from ARM) 49 return -EINVAL; in arc_get_cpu_map() 52 return -EINVAL; in arc_get_cpu_map() 58 * Read from DeviceTree and setup cpu possible mask. If there is no 59 * "possible-cpus" property in DeviceTree pretend all [0..NR_CPUS-1] exist. 65 if (arc_get_cpu_map("possible-cpus", &cpumask)) { in arc_init_cpu_possible() 66 pr_warn("Failed to get possible-cpus from dtb, pretending all %u cpus exist\n", in arc_init_cpu_possible() [all …]
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/linux/arch/m68k/fpsp040/ |
H A D | gen_except.S | 4 | gen_except --- FPSP routine to detect reportable exceptions 7 | user_fpcr on the stack with the exception status byte 32 | For details on the license for this file, please see the 58 cmpib #IDLE_SIZE-4,1(%a7) |test for idle frame 59 beq do_check |go handle idle frame 60 cmpib #UNIMP_40_SIZE-4,1(%a7) |test for orig unimp frame 62 cmpib #UNIMP_41_SIZE-4,1(%a7) |test for rev unimp frame 64 cmpib #BUSY_SIZE-4,1(%a7) |if size <> $60, fmt error 66 leal BUSY_SIZE+LOCAL_SIZE(%a7),%a1 |init a1 so fpsp.h 86 | Or in the FPSR from the emulation with the USER_FPSR on the stack. [all …]
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/linux/arch/arm/mach-tegra/ |
H A D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/arch/arm/mach-tegra/platsmp.c 16 #include <linux/init.h> 26 #include <asm/mach-types.h> 42 static int tegra20_boot_secondary(unsigned int cpu, struct task_struct *idle) in tegra20_boot_secondary() argument 50 * power-gated via the flow controller). This will have no in tegra20_boot_secondary() 51 * effect on first boot of the CPU since it should already be in tegra20_boot_secondary() 58 * power-gate the CPU this will cause the flow controller to in tegra20_boot_secondary() 70 static int tegra30_boot_secondary(unsigned int cpu, struct task_struct *idle) in tegra30_boot_secondary() argument 84 * power will be resumed automatically after un-halting the in tegra30_boot_secondary() [all …]
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/linux/Documentation/networking/device_drivers/hamradio/ |
H A D | z8530drv.rst | 1 .. SPDX-License-Identifier: GPL-2.0 5 SCC.C - Linux driver for Z8530 based HDLC cards for AX.25 14 1. ftp://ftp.ccac.rwth-aachen.de/pub/jr/z8530drv-utils_3.0-3.tar.gz 16 2. ftp://ftp.pspt.fi/pub/ham/linux/ax25/z8530drv-utils_3.0-3.tar.gz 20 Linux Kernel AX.25 documentation and programs, is available on 41 AX.25-HOWTO on how to emulate a KISS TNC on network device drivers. 54 please read 'man insmod' that comes with module-init-tools. 64 of your rc.*-files. This has to be done BEFORE you can 82 irq 5 # IRQ No. 5 85 escc no # enhanced SCC chip? (8580/85180/85280) [all …]
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/linux/drivers/scsi/ |
H A D | aha1542.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 12 #define INIT BIT(5) /* Mailbox Initialization Required */ macro 13 #define IDLE BIT(4) /* SCSI Host Adapter Idle */ macro 18 #define STATMASK (STST | DIAGF | INIT | IDLE | CDF | DF | INVDCMD) 37 #define CMD_NOP 0x00 /* No Operation */ 42 #define CMD_BUSON_TIME 0x07 /* Set Bus-On Time */ 43 #define CMD_BUSOFF_TIME 0x08 /* Set Bus-Off Time */ 59 /* This is used with scatter-gather */ 88 /* Bits 7-5: op=0, 2: Target ID, op=1: Initiator ID */ 91 /* Bits 2-0: Logical Unit Number */
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/linux/arch/powerpc/kernel/ |
H A D | idle_6xx.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 9 * be done to check a runtime var (a bit like powersave-nap) 18 #include <asm/asm-offsets.h> 19 #include <asm/feature-fixups.h> 24 * Init idle, called at early CPU setup time from head.S for each CPU 25 * Make sure no rest of NAP mode remains in HID0, save default 55 * depending on the various features. 66 * can be cleared by CPU init after the fixups are done 84 /* Some pre-nap cleanups needed on some CPUs */ 88 /* Disable L2 prefetch on some 745x and try to ensure [all …]
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/linux/arch/x86/kernel/ |
H A D | process.c | 1 // SPDX-License-Identifier: GPL-2.0 12 #include <linux/sched/idle.h> 16 #include <linux/init.h> 21 #include <linux/user-return-notifier.h> 27 #include <linux/elf-randomize.h> 31 #include <linux/entry-common.h> 48 #include <asm/spec-ctrl.h> 61 * per-CPU TSS segments. Threads are completely 'soft' on Linux, 62 * no more per-task TSS's. The TSS size is kept cacheline-aligned 64 * section. Since TSS's are completely CPU-local, we want them [all …]
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/linux/drivers/cpuidle/governors/ |
H A D | menu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * menu.c - the menu idle governor 5 * Copyright (C) 2006-2007 Adam Belay <abelay@novell.com> 39 * ----------------------- 41 * the C state is required to actually break even on this cost. CPUIDLE 43 * need is a good prediction of how long we'll be idle. Like the traditional 49 * that is based on historic behavior. For example, if in the past the actual 55 * ratio is dependent on the order of magnitude of the expected duration; if we 56 * expect 500 milliseconds of idle time the likelihood of getting an interrupt 57 * very early is much higher than if we expect 50 micro seconds of idle time. [all …]
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/linux/Documentation/devicetree/bindings/gpio/ |
H A D | ti,omap-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Grygorii Strashko <grygorii.strashko@ti.com> 13 The general-purpose interface combines general-purpose input/output (GPIO) banks. 14 Each GPIO banks provides up to 32 dedicated general-purpose pins with input 15 and output capabilities; interrupt generation in active mode and wake-up 16 request generation in idle mode upon the detection of external events. 21 - enum: [all …]
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/linux/Documentation/RCU/Design/Memory-Ordering/ |
H A D | Tree-RCU-Memory-Ordering.rst | 2 A Tour Through TREE_RCU's Grace-Period Memory Ordering 13 grace-period memory ordering guarantee is provided. 18 RCU grace periods provide extremely strong memory-ordering guarantees 19 for non-idle non-offline code. 22 period that are within RCU read-side critical sections. 25 of that grace period that are within RCU read-side critical sections. 27 Note well that RCU-sched read-side critical sections include any region 30 an extremely small region of preemption-disabled code, one can think of 31 ``synchronize_rcu()`` as ``smp_mb()`` on steroids. 37 a linked RCU-protected data structure, and phase two frees that element. [all …]
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