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/freebsd/sys/contrib/device-tree/Bindings/net/can/
H A Dsja1000.txt5 - compatible : should be one of "nxp,sja1000", "technologic,sja1000".
7 - reg : should specify the chip select, address offset and size required
10 - interrupts: property with a value describing the interrupt source
15 - reg-io-width : Specify the size (in bytes) of the IO accesses that
20 - nxp,external-clock-frequency : Frequency of the external oscillator
25 - nxp,tx-output-mode : operation mode of the TX output control logic:
26 <0x0> : bi-phase output mode
31 - nxp,tx-output-config : TX output pin configuration:
33 <0x02> : TX0 pull-down (default)
34 <0x04> : TX0 pull-up
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H A Dnxp,sja1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfgang Grandegger <wg@grandegger.com>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
19 - enum:
20 - renesas,r9a06g032-sja1000 # RZ/N1D
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx27-phytec-phycore-rdk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include "imx27-phytec-phycore-som.dtsi"
9 compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm03
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/freebsd/sys/dev/safe/
H A Dsafe.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
32 * SafeNet SafeXcel-1141 hardware crypto accelerator
133 bus_dmamap_sync((_dma)->dma_tag, (_dma)->dma_map, (_flags))
167 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (r))
170 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, reg, val)
181 0, "RNG polling buffer size (32-bit words)");
200 switch (pci_get_vendor(sc->sc_dev)) { in safe_partname()
202 switch (pci_get_device(sc->sc_dev)) { in safe_partname()
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
98 … (0x1<<0) // I/O space access enable. There are no I/O BARs supported.
116 … (0x1<<9) // Fast back-to-back transaction ena…
[all …]
/freebsd/sys/contrib/openzfs/module/zfs/
H A Ddsl_scan.c9 * or https://opensource.org/licenses/CDDL-1.0.
70 * case with pools given the allocation patterns of copy-on-write filesystems.
72 * way that will most benefit physical disks (LBA-order).
108 * This new algorithm is backwards compatible with the legacy on-disk data
149 * limit before each txg. If finer-grained control of this is needed
159 * which would cause long txg sync times. No matter what, we will not
172 * fill_weight is non-tunable at runtime, so we copy it at module init from
231 ((scn)->scn_phys.scn_func == POOL_SCAN_SCRUB || \
232 (scn)->scn_phys.scn_func == POOL_SCAN_RESILVER)
235 ((scn)->scn_phys.scn_func == POOL_SCAN_SCRUB)
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp1 //===- SLPVectorizer.cpp - A bottom up SLP Vectorizer --------
18404 tryToVectorizeSequence(SmallVectorImpl<T * > & Incoming,function_ref<bool (T *,T *)> Comparator,function_ref<bool (T *,T *)> AreCompatible,function_ref<bool (ArrayRef<T * >,bool)> TryToVectorizeHelper,bool MaxVFOnly,BoUpSLP & R) tryToVectorizeSequence() argument
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/freebsd/share/dict/
H A Dweb2a12 A-b-c book
13 A-b-c method
14 abdomino-uterotomy
15 Abdul-baha
16 a-be
20 able-bodied
21 able-bodiedness
22 able-minded
23 able-mindedness
27 Abor-miri
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H A Dweb228125 bypass
40249 comparator
99810 Jean-Christophe
99811 Jean-Pierre
124860 No
124861 no