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/linux/Documentation/input/devices/
H A Dwalkera0701.rst104 One binary and octal value can be grouped to nibble. 24 nibbles + one binary
109 absolute binary value. (10 bits per channel). Next nibble is checksum for
114 four channels. In nibbles 22 and 23 is a special magic number. Nibble 24 is
117 After last octal value for nibble 24 and next sync pulse one additional
126 nibble (only first 3 bits are used). Binary value for checksum nibble is
/linux/drivers/media/rc/keymaps/
H A Drc-dvbsky.c6 * Copyright (c) 2010-2012 by Nibble Max <nibble.max@gmail.com>
73 MODULE_AUTHOR("Nibble Max <nibble.max@gmail.com>");
/linux/drivers/parport/
H A Dieee1284_ops.c143 /* Nibble mode. */
157 unsigned char nibble; in parport_ieee1284_read_nibble()
175 pr_debug("%s: Nibble timeout at event 9 (%d bytes)\n", in parport_ieee1284_read_nibble()
182 /* Read a nibble. */ in parport_ieee1284_read_nibble()
183 nibble = parport_read_status (port) >> 3; in parport_ieee1284_read_nibble()
184 nibble &= ~8; in parport_ieee1284_read_nibble()
185 if ((nibble & 0x10) == 0) in parport_ieee1284_read_nibble()
186 nibble |= 8; in parport_ieee1284_read_nibble()
187 nibble &= 0xf; in parport_ieee1284_read_nibble()
197 pr_debug("%s: Nibble timeout at event 11\n", in parport_ieee1284_read_nibble()
[all …]
H A Dieee1284.c430 /* xflag should be high for all modes other than nibble (0). */ in parport_negotiate()
690 /* if we can tri-state use BYTE mode instead of NIBBLE mode, in parport_read()
691 * if that fails, revert to NIBBLE mode -- ought to store somewhere in parport_read()
705 fallthrough; /* to NIBBLE */ in parport_read()
707 pr_debug("%s: Using nibble mode\n", port->name); in parport_read()
/linux/drivers/net/plip/
H A Dplip.c61 Trigger by sending nibble '0x8' (this causes interrupt on other end)
134 /* Nibble time out = PLIP_NIBBLE_WAIT * PLIP_DELAY_UNIT usec */
184 enum plip_nibble_state nibble; member
214 unsigned long nibble; member
306 nl->nibble = PLIP_NIBBLE_WAIT; in plip_init_netdev()
591 unsigned short nibble_timeout = nl->nibble; in plip_receive_packet()
603 rcv->nibble = PLIP_NB_BEGIN; in plip_receive_packet()
609 &rcv->nibble, &rcv->length.b.lsb)) { in plip_receive_packet()
621 &rcv->nibble, &rcv->length.b.lsb)) in plip_receive_packet()
629 &rcv->nibble, &rcv->length.b.msb)) in plip_receive_packet()
[all …]
/linux/drivers/media/tuners/
H A Dm88rs6000t.h5 * Copyright (C) 2014 Max nibble <nibble.max@gmail.com>
/linux/sound/firewire/digi00x/
H A Damdtp-dot.c65 * the length of the added pattern only depends on the lower nibble in dot_scrt()
72 * the lower nibble of the salt. Interleaved sequence. in dot_scrt()
78 /* circular list for the salt's hi nibble. */ in dot_scrt()
83 * start offset for upper nibble mapping. in dot_scrt()
84 * note: 9 is /special/. In the case where the high nibble == 0x9, in dot_scrt()
85 * hir[] is not used and - coincidentally - the salt's hi nibble is in dot_scrt()
/linux/arch/arm/probes/
H A Ddecode.c248 /* Each nibble has same value as that at INSN_NEW_BITS bit 16 */
254 * Each nibble in regs contains a value from enum decode_reg_type. For each
255 * non-zero value, the corresponding nibble in pinsn is validated and modified
261 probes_opcode_t mask = 0xf; /* Start at least significant nibble */ in decode_regs()
270 /* Nibble not a register, skip to next */ in decode_regs()
319 /* Replace value of nibble with new register number... */ in decode_regs()
/linux/drivers/scsi/isci/
H A Dremote_node_table.h153 * sets of three into a single nibble. When the STP RNi is allocated all
154 * of the bits in the nibble are cleared. This math results in a table size
162 * This field is the nibble selector for the above table. There are three
/linux/Documentation/networking/
H A Dplip.rst199 send header nibble '0x8'
210 To start a transfer the transmitting machine outputs a nibble 0x08.
219 OUT := low nibble, OUT.4 := 1
221 OUT := high nibble, OUT.4 := 0
/linux/drivers/media/rc/
H A Dir-xmp-decoder.c89 * the 4th nibble should be 15 so base the divider on this in ir_xmp_decode()
148 /* Expect 8 or 16 nibble pulses. 16 in case of 'final' frame */ in ir_xmp_decode()
168 /* store nibble raw data, decode after trailer */ in ir_xmp_decode()
/linux/drivers/leds/
H A Dleds-mlxcpld.c263 * Each LED is controlled through low or high nibble of the relevant in mlxcpld_led_store_hw()
268 * Parameter mask specifies which nibble is used for specific LED: mask in mlxcpld_led_store_hw()
269 * 0xf0 - lower nibble is to be used (bits from 0 to 3), mask 0x0f - in mlxcpld_led_store_hw()
270 * higher nibble (bits from 4 to 7). in mlxcpld_led_store_hw()
/linux/drivers/staging/fbtft/
H A Dfb_uc1611.c170 | (0x0 & 0x1)); /* MS nibble last (default) */ in set_var()
183 | (0x0 & 0x1)); /* MS nibble last (default) */ in set_var()
196 | (0x0 & 0x1)); /* MS nibble last (default) */ in set_var()
209 | (0x0 & 0x1)); /* MS nibble last (default) */ in set_var()
/linux/drivers/auxdisplay/
H A Dhd44780.c85 /* High nibble + RS, RW */ in hd44780_write_gpio4()
95 /* Low nibble */ in hd44780_write_gpio4()
162 /* Command nibble + RS, RW */ in hd44780_write_cmd_raw_gpio4()
/linux/drivers/isdn/mISDN/
H A Ddsp_blowfish.c373 u8 nibble; in dsp_bf_encrypt() local
389 nibble = dsp_audio_law2seven[bf_data_in[4]]; in dsp_bf_encrypt()
390 yr = nibble; in dsp_bf_encrypt()
391 yl = (yl << 4) | (nibble >> 3); in dsp_bf_encrypt()
464 u8 nibble; in dsp_bf_decrypt() local
487 nibble = bf_crypt_inring[j++ & 15]; /* bit7 = 0 */ in dsp_bf_decrypt()
488 yr = nibble; in dsp_bf_decrypt()
489 yl = (yl << 4) | (nibble >> 3); in dsp_bf_decrypt()
/linux/drivers/net/ethernet/realtek/
H A Datp.h56 #define ISRh_RxErr 0x11 /* ISR, high nibble */
197 /* Write a byte out using nibble mode. The low nibble is written first. */
/linux/arch/arm/mm/
H A Dabort-lv4t.S91 and r9, r8, #0x00f @ get Rm / low nibble of immediate value
93 andne r6, r8, #0xf00 @ { immediate high nibble
212 adc r6, r6, r6, lsr #4 @ high + low nibble + R bit
/linux/drivers/media/pci/smipcie/
H A Dsmipcie-ir.c5 * Copyright (C) 2014 Max nibble <nibble.max@gmail.com>
/linux/Documentation/ABI/testing/
H A Dsysfs-driver-wacom77 the display. The low nibble of each byte contains the first
78 line, and the high nibble contains the second line.
/linux/arch/x86/pci/
H A Dirq.c273 * lines are mapped in the low and the high 4-bit nibble of the
345 * - bit 3 selects the nibble within the INTx Routing Table Mapping Register,
589 * The VIA pirq rules are nibble-based, like ALI,
605 * The VIA pirq rules are nibble-based, like ALI,
607 * However, for 82C586, nibble map is different .
627 * ITE 8330G pirq rules are nibble-based
649 * OPTI: high four bits are nibble pointer..
664 * Cyrix: nibble offset 0x5C
850 * VLSI: nibble offset 0x74 - educated guess due to routing table and
882 * register is a straight binary coding of desired PIC IRQ (low nibble).
[all …]
/linux/drivers/video/backlight/
H A Darcxcnn_bl.c73 #define ARCXCNN_WLED_ISET_LSB 0x07 /* LED ISET LSB (in upper nibble) */
117 /* lower nibble of brightness goes in upper nibble of LSB register */ in arcxcnn_set_brightness()
/linux/drivers/gpu/drm/panel/
H A Dpanel-novatek-nt35510.c209 * bits 0..2 in the lower nibble controls PCK, the booster clock
219 * bits 4..6 in the upper nibble controls BTP, the boosting
238 * bits 0..2 in the lower nibble controls NCK, the booster clock
240 * bits 4..5 in the upper nibble controls BTN, the boosting
258 * bits 0..2 in the lower nibble controls CLCK, the booster clock
260 * bits 4..5 in the upper nibble controls BTCL, the boosting
277 * bits 0..2 in the lower nibble controls HCK, the booster clock
279 * bits 4..5 in the upper nibble controls BTH, the boosting
296 * bits 0..2 in the lower nibble controls LCK, the booster clock
298 * bits 4..5 in the upper nibble controls BTL, the boosting
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_mfw_req.h159 * 9 nibbles, the position of each nibble
161 * of the nibble = S-PCP value.
/linux/include/uapi/linux/
H A Dif_plip.h21 unsigned long nibble; member
/linux/drivers/media/usb/gspca/
H A Dsonixb.c14 0x10 high nibble red gain low nibble blue gain
15 0x11 low nibble green gain
29 0x19 high-nibble is sensor clock divider, changes exposure on sensors which
93 /* priv field of struct v4l2_pix_format flags (do not use low nibble!) */
214 /* Set clock register 0x11 low nibble is clock divider */
696 /* register 19's high nibble contains the sn9c10x clock divider in setexposure()
697 The high nibble configures the no fps according to the in setexposure()
708 exposure, register 11, whose low nibble sets the nr off fps in setexposure()
763 /* Write reg 10 and reg11 low nibble */ in setexposure()
1138 nibble of 0x19 is exposure (clock divider) just as with in sd_start()

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