Searched +full:nfc +full:- +full:v3p10 (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/mtd/arasan,nand-controller.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - $ref: nand-controller.yaml13 - Michal Simek <michal.simek@amd.com>18 - enum:19 - xlnx,zynqmp-nand-controller20 - const: arasan,nfc-v3p1027 - description: Controller clock[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2014 - 2020 Xilinx, Inc.17 #include <linux/dma-mapping.h>114 #define ANFC_MAX_PKT_SIZE (SZ_2K - 1)124 * struct anfc_op - Defines how to execute an operation150 * struct anand - Defines the NAND chip related information153 * @rb: Ready-busy line157 * @timings: NV-DDR specific timings to use167 * @cs_idx: Array of chip-select for this device, values are indexes193 * struct arasan_nfc - Defines the Arasan NAND flash controller driver instance[all …]
1 // SPDX-License-Identifier: GPL-2.0+5 * (C) Copyright 2014 - 2021, Xilinx, Inc.15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>16 #include <dt-bindings/gpio/gpio.h>17 #include <dt-bindings/interrupt-controller/arm-gic.h>18 #include <dt-bindings/interrupt-controller/irq.h>19 #include <dt-bindings/power/xlnx-zynqmp-power.h>20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>21 #include <dt-bindings/thermal/thermal.h>25 #address-cells = <2>;[all …]