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/freebsd/sys/contrib/device-tree/Bindings/net/nfc/
H A Dmarvell,nci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/marvel
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H A Dnfcmrvl.txt1 * Marvell International Ltd. NCI NFC Controller
4 - compatible: Should be:
5 - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices
6 - "marvell,nfc-i2c" for I2C devices
7 - "marvell,nfc-spi" for SPI devices
10 - pinctrl-names: Contains only one value - "default".
11 - pintctrl-0: Specifies the pin control groups used for this controller.
12 - reset-n-io: Output GPIO pin used to reset the chip (active low).
13 - hci-muxed: Specifies that the chip is muxing NCI over HCI frames.
15 Optional UART-based chip specific properties:
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H A Dst,st-nci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/st,st-nci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics ST NCI NFC controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - st,st21nfcb-i2c
16 - st,st21nfcb-spi
17 - st,st21nfcc-i2c
19 reset-gpios:
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H A Dst95hf.txt1 * STMicroelectronics : NFC Transceiver ST95HF
3 ST NFC Transceiver is required to attach with SPI bus.
4 ST95HF node should be defined in DT as SPI slave device of SPI
11 - reg: Address of SPI slave "ST95HF transceiver" on SPI master bus.
13 - compatible: should be "st,st95hf" for ST95HF NFC transceiver
15 - spi-max-frequency: Max. operating SPI frequency for ST95HF
18 - enable-gpio: GPIO line to enable ST95HF transceiver.
20 - interrupts : Standard way to define ST95HF transceiver's out
25 - st95hfvin-supply : This is an optional property. It contains a
30 spi@9840000 {
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H A Dst,st95hf.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/st,st95hf.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics ST95HF NFC controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
16 enable-gpio:
25 st95hfvin-supply:
29 - compatible
30 - enable-gpio
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H A Dst-nci-spi.txt1 * STMicroelectronics SAS. ST NCI NFC Controller
4 - compatible: Should be "st,st21nfcb-spi"
5 - spi-max-frequency: Maximum SPI frequency (<= 4000000).
6 - interrupts: GPIO interrupt to which the chip is connected
7 - reset-gpios: Output GPIO pin used to reset the ST21NFCB
10 - pinctrl-names: Contains only one value - "default".
11 - pintctrl-0: Specifies the pin control groups used for this controller.
12 - ese-present: Specifies that an ese is physically connected to the nfc
14 - uicc-present: Specifies that the uicc swp signal can be physically
15 connected to the nfc controller.
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H A Dti,trf7970a.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/ti,trf7970a.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments TRF7970A RFID/NFC/15693 Transceiver
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Mark Greer <mgreer@animalcreek.com>
17 autosuspend-delay:
22 clock-frequency:
27 en2-rf-quirk:
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H A Dtrf7970a.txt1 * Texas Instruments TRF7970A RFID/NFC/15693 Transceiver
4 - compatible: Should be "ti,trf7970a".
5 - spi-max-frequency: Maximum SPI frequency (<= 2000000).
6 - interrupts: A single interrupt specifier.
7 - ti,enable-gpios: One or two GPIO entries used for 'EN' and 'EN2' pins on the
9 - vin-supply: Regulator for supply voltage to VIN pin
12 - pinctrl-names: Contains only one value - "default".
13 - pintctrl-0: Specifies the pin control groups used for this controller.
14 - autosuspend-delay: Specify autosuspend delay in milliseconds.
15 - irq-status-read-quirk: Specify that the trf7970a being used has the
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/freebsd/sys/contrib/device-tree/src/arm/nxp/vf/
H A Dvf610-bk4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
15 stdout-path = &uart1;
23 audio_ext: oscillator-audio {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <24576000>;
29 enet_ext: oscillator-etherne
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H A Dvf610-twr.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
10 compatible = "fsl,vf610-twr", "fsl,vf610";
22 compatible = "fixed-clock";
23 #clock-cells = <0>;
24 clock-frequency = <24576000>;
28 compatible = "fixed-clock";
29 #clock-cell
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H A Dvfxxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #include "vf610-pinfunc.h"
6 #include <dt-bindings/clock/vf610-clock.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/gpio/gpio.h>
32 compatible = "fixed-cloc
689 nfc: nand@400e0000 { global() label
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-binding
313 nfc: nand-controller@10500000 { global() label
544 spi: spi@20074000 { global() label
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H A Drk3xxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/soc/rockchip,boot-mod
249 nfc: nand-controller@10500000 { global() label
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H A Drk3128.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/rk3128-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-binding
174 nfc: nand-controller@10500000 { global() label
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H A Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-binding
183 spi: spi@10270000 { global() label
459 nfc: nand-controller@30100000 { global() label
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-ux500-samsung-codina.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Ace 2 GT-I8160 also known as Codina.
11 * The Samsung tree further talks about GT-I8160P and GT-I8160chn (China).
12 * The GT-I8160 plain is known as the "europe" variant.
13 * The GT-I8160P is the CDMA version and it appears to not use the ST
14 * Microelectronics accelerometer and reportedly has NFC mounte
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H A Dste-ux500-samsung-janice.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy S Advance GT-I9070 also known as Janice.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctr
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ull-dhcor-maveo-box.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 * DHCR-iMX6ULL-C080-R051-SPI-WBT-I-01LG
8 * DHCOR PCB number: 578-200 or newer
9 * maveo box PCB number: 525-200 or newer
12 /dts-v1/;
14 #include "imx6ull-dhcor-som.dtsi"
18 compatible = "marantec,imx6ull-dhcor-maveo-box", "dh,imx6ull-dhcor-som",
28 stdout-path = "serial0:115200n8";
31 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
32 compatible = "regulator-fixed";
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H A Dimx6dl-prtrvt.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
8 #include "imx6qdl-prti6q.dtsi"
9 #include <dt-bindings/leds/common.h>
21 compatible = "gpio-leds";
22 pinctrl-names = "default";
23 pinctrl-0 = <&pinctrl_leds>;
25 led-debug0 {
28 linux,default-trigger = "heartbeat";
34 pinctrl-names = "default";
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H A Dimx27-pdk.dts1 // SPDX-License-Identifier: GPL-2.0+
5 /dts-v1/;
10 compatible = "fsl,imx27-pdk", "fsl,imx27";
19 compatible = "usb-nop-xceiv";
21 clock-names = "main_clk";
22 #phy-cells = <0>;
27 pinctrl-name
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H A Dimx31-lite.dts1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
5 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 compatible = "logicpd,imx31-lite", "fsl,imx31";
17 stdout-path = &uart1;
26 compatible = "gpio-leds";
42 &nfc {
43 nand-bus-width = <8>;
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/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dsama5d2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usar
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H A Dsama7g5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controlle
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/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dpdm360ng.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2009 - 2010 DENX Software Engineering.
17 #address-cells = <1>;
18 #size-cells = <1>;
19 interrupt-parent = <&ipic>;
26 nfc@40000000 {
27 bank-width = <0x1>;
41 compatible = "amd,s29gl01gp", "cfi-flash";
44 #address-cells = <1>;
45 #size-cells = <1>;
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H A Dac14xx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #address-cells = <1>;
15 #size-cells = <1>;
26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
36 nfc@40000000 {
49 compatible = "cfi-flash";
51 #address-cells = <1>;
52 #size-cells = <1>;
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