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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dcec.txt3 - hdmi-phandle: phandle to the HDMI controller.
5 - needs-hpd: if present the CEC support is only available when the HPD
6 is high. Some boards only let the CEC pin through if the HPD is high,
7 for example if there is a level converter that uses the HPD to power
H A Ds5p-cec.txt7 - compatible : value should be following
8 "samsung,s5p-cec"
10 - reg : Physical base address of the IP registers and length of memory
13 - interrupts : HDMI CEC interrupt number to the CPU.
14 - clocks : from common clock binding: handle to HDMI CEC clock.
15 - clock-names : from common clock binding: must contain "hdmicec",
17 - samsung,syscon-phandle - phandle to the PMU system controller
18 - hdmi-phandle - phandle to the HDMI controller, see also cec.txt.
21 - needs-hpd : if present the CEC support is only available when the HPD
27 compatible = "samsung,s5p-cec";
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/freebsd/sys/contrib/device-tree/Bindings/media/cec/
H A Dcec-common.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/cec/cec-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hans Verkuil <hverkuil@xs4all.nl>
14 pattern: "^cec(@[0-9a-f]+|-[0-9]+)?$"
16 hdmi-phandle:
21 needs-hpd:
24 The CEC support is only available when the HPD is high. Some boards only
25 let the CEC pin through if the HPD is high, for example if there is a
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H A Dsamsung,s5p-cec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/cec/samsung,s5p-cec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
14 - $ref: cec-common.yaml#
18 const: samsung,s5p-cec
23 clock-names:
25 - const: hdmicec
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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4412-odroidu3.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel's Exynos4412 based ODROID-U3 board device tree source
7 * Device tree source file for Hardkernel's ODROID-U3 board which is based
11 /dts-v1/;
12 #include <dt-bindings/leds/common.h>
13 #include "exynos4412-odroid-common.dtsi"
14 #include "exynos4412-prim
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H A Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
36 debounce-interval = <0>;
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
25 stdout-path = "serial0:115200n8";
29 compatible = "pwm-backlight";
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-suppl
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/freebsd/sys/dev/drm2/
H A Ddrm_crtc_helper.c2 * Copyright (c) 2006-2008 Intel Corporation
41 * drm_helper_move_panel_connectors_to_head() - move panels to the front in the
59 &dev->mode_config.connector_list, head) { in drm_helper_move_panel_connectors_to_head()
60 if (connector->connector_type == DRM_MODE_CONNECTOR_LVDS || in drm_helper_move_panel_connectors_to_head()
61 connector->connector_type == DRM_MODE_CONNECTOR_eDP) in drm_helper_move_panel_connectors_to_head()
62 list_move_tail(&connector->head, &panel_list); in drm_helper_move_panel_connectors_to_head()
65 list_splice(&panel_list, &dev->mode_config.connector_list); in drm_helper_move_panel_connectors_to_head()
80 list_for_each_entry(mode, &connector->modes, head) { in drm_mode_validate_flag()
81 if ((mode->flags & DRM_MODE_FLAG_INTERLACE) && in drm_mode_validate_flag()
83 mode->status = MODE_NO_INTERLACE; in drm_mode_validate_flag()
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra132-norrin.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
30 vdd-supply = <&vdd_3v3_hdmi>;
31 pll-supply = <&vdd_hdmi_pll>;
32 hdmi-supply = <&vdd_5v0_hdmi>;
34 nvidia,ddc-i2
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/freebsd/sys/arm64/arm64/
H A Didentcpu.c1 /*-
85 * The default implementation of I-cache sync assumes we have an
100 if ((req->flags & SCTL_MASK32) != 0 && adaptive_machine_arch) in sysctl_hw_machine()
119 * Per-CPU affinity as provided in MPIDR_EL1
125 * Aff1 - Cluster number
126 * Aff0 - CPU number in Aff1 cluster
174 return (&cpu_desc[cpu - 1]); in get_cpu_desc()
195 * Per-implementer table of (PartNum, CPU Name) pairs.
200 { CPU_PART_FOUNDATION, "Foundation-Model" },
201 { CPU_PART_CORTEX_A34, "Cortex-A34" },
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