| /freebsd/sys/contrib/device-tree/src/mips/brcm/ |
| H A D | bcm7346.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
|
| H A D | bcm7125.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
|
| H A D | bcm7358.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
|
| H A D | bcm7435.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
[all …]
|
| H A D | bcm7425.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
|
| H A D | bcm7360.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
|
| H A D | bcm7362.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
|
| H A D | bcm7420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
|
| /freebsd/contrib/openbsm/ |
| H A D | configure.ac | 1 # -*- Autoconf -*-
5 AC_INIT([OpenBSM], [1.2-alpha5], [trustedbsd-audit@TrustedBSD.org],[openbsm])
13 # --with-native-includes forces the use of the system bsm headers.
14 AC_ARG_WITH([native-includes],
15 [AS_HELP_STRING([--with-native-includes],
16 [Use the system native include files instead of those included with openbsm.])],
18 AC_DEFINE(USE_NATIVE_INCLUDES,, Define to use native include files)
123 # depend on them or it will generate link-time or run-time errors. Test for
142 # We rely on the BSD be32toh() and be32enc()-style endian macros to perform
143 # byte order conversions. Availability of these varies considerably -- in
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/ |
| H A D | common-properties.txt | 5 ----------
13 - big-endian: Boolean; force big endian register accesses
15 know the peripheral always needs to be accessed in big endian (BE) mode.
16 - little-endian: Boolean; force little endian register accesses
18 peripheral always needs to be accessed in little endian (LE) mode.
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22 will ever be performed. Use this if the hardware "self-adjusts"
27 In such cases, little-endian is the preferred default, but it is not
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/regmap/ |
| H A D | regmap.txt | 5 little-endian,
6 big-endian,
7 native-endian: See common-properties.txt for a definition
10 Regmap defaults to little-endian register access on MMIO based
12 architectures that typically run big-endian operating systems
13 (e.g. PowerPC), registers can be defined as big-endian and must
16 On SoCs that can be operated in both big-endian and little-endian
19 chips), "native-endian" is used to allow using the same device tree
23 Scenario 1 : a register set in big-endian mode.
27 big-endian;
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | Endian.h | 1 //===- Endian.h - Utilities for IO with endian specific data ----*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file declares generic functions to read and write endian specific data.
11 //===----------------------------------------------------------------------===//
41 namespace endian {
44 [[nodiscard]] inline value_type byte_swap(value_type value, endianness endian) { in byte_swap() argument
45 if (endian != llvm::endianness::native) in byte_swap()
51 template <typename value_type, endianness endian>
53 return byte_swap(value, endian); in byte_swap()
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|
| H A D | HashBuilder.h | 1 //===- llvm/Support/HashBuilder.h - Convenient hashing interface-*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exceptio
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| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | intel,ixp4xx-expansion-bus-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <linus.walleij@linaro.org>
19 pattern: '^bus@[0-9a-f]+$'
23 - enum:
24 - intel,ixp42x-expansion-bus-controller
25 - intel,ixp43x-expansion-bus-controller
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | brcm,bcm6345-gpio.txt | 1 Bindings for the Broadcom's brcm,bcm6345-gpio memory-mapped GPIO controllers.
5 BCM6338 have 8-bit data and dirout registers, where GPIO state can be read
7 BCM6345 have 16-bit data and dirout registers, where GPIO state can be read
11 - compatible: should be "brcm,bcm6345-gpio"
12 - reg-names: must contain
13 "dat" - data register
14 "dirout" - direction (output) register
15 - reg: address + size pairs describing the GPIO register sets;
16 order must correspond with the order of entries in reg-names
17 - #gpio-cells: must be set to 2. The first cell is the pin number and
[all …]
|
| H A D | gpio-mmio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-mmio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Bartosz Golaszewski <brgl@bgdev.pl>
15 of set/clear-bit registers. Such controllers are common for glue logic in
16 FPGAs or ASICs. Commonly, these controllers are accessed over memory-mapped
17 NAND-style parallel busses.
22 - brcm,bcm6345-gpio
[all …]
|
| H A D | brcm,bcm6345-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/brcm,bcm6345-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
14 Bindings for Broadcom's BCM63xx memory-mapped GPIO controllers.
19 BCM6338 have 8-bit data and dirout registers, where GPIO state can be read
21 BCM6345 have 16-bit data and dirout registers, where GPIO state can be read
23 BCM6318, BCM6328, BCM6358, BCM6362, BCM6368 and BCM63268 have 32-bit data
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/bus/ |
| H A D | intel,ixp4xx-expansion-bus-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/intel,ixp4xx-expansion-bus-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <linus.walleij@linaro.org>
19 pattern: '^bus@[0-9a-f]+$'
23 - enum:
24 - intel,ixp42x-expansion-bus-controller
25 - intel,ixp43x-expansion-bus-controller
[all …]
|
| /freebsd/contrib/file/doc/ |
| H A D | magic.man | 37 .Bl -tag -width ".Dv message"
42 .Bl -bullet -compact
50 A continuation offset relative to the end of the last up-level field
60 .Bl -tag -width ".Dv lestring16"
62 A one-byte value.
64 A two-byte value in this machine's native byte order.
66 A four-byte value in this machine's native byte order.
68 An eight-byte value in this machine's native byte order.
70 A 32-bit single precision IEEE floating point number in this machine's native byte order.
72 A 64-bit double precision IEEE floating point number in this machine's native byte order.
[all …]
|
| /freebsd/sys/contrib/device-tree/src/xtensa/ |
| H A D | xtfpga.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 compatible = "cdns,xtensa-xtfpga";
4 #address-cells = <1>;
5 #size-cells = <1>;
6 interrupt-parent = <&pic>;
18 #address-cells = <1>;
19 #size-cells = <0>;
21 compatible = "cdns,xtensa-cpu";
28 compatible = "cdns,xtensa-pic";
33 #interrupt-cells = <2>;
[all …]
|
| /freebsd/sys/dev/ath/ath_hal/ |
| H A D | ah_eeprom_v14.c | 1 /*-
2 * SPDX-License-Identifier: ISC
30 #define IS_VERS(op, v) ((pBase->version & AR5416_EEP_VER_MINOR_MASK) op (v)) in v14EepromGet()
31 HAL_EEPROM_v14 *ee = AH_PRIVATE(ah)->ah_eeprom; in v14EepromGet()
32 const MODAL_EEP_HEADER *pModal = ee->ee_base.modalHeader; in v14EepromGet()
33 const BASE_EEP_HEADER *pBase = &ee->ee_base.baseEepHeader; in v14EepromGet()
49 macaddr[i] = pBase->macAddr[i]; in v14EepromGet()
50 sum += pBase->macAddr[i]; in v14EepromGet()
59 return pBase->regDmn[0]; in v14EepromGet()
61 return pBase->regDmn[1]; in v14EepromGet()
[all …]
|
| H A D | ah_eeprom_v4k.c | 1 /*-
2 * SPDX-License-Identifier: ISC
32 #define IS_VERS(op, v) ((pBase->version & AR5416_EEP_VER_MINOR_MASK) op (v)) in v4kEepromGet()
33 HAL_EEPROM_v4k *ee = AH_PRIVATE(ah)->ah_eeprom; in v4kEepromGet()
34 const MODAL_EEP4K_HEADER *pModal = &ee->ee_base.modalHeader; in v4kEepromGet()
35 const BASE_EEP4K_HEADER *pBase = &ee->ee_base.baseEepHeader; in v4kEepromGet()
42 *(int16_t *)val = pModal->noiseFloorThreshCh[0]; in v4kEepromGet()
48 macaddr[i] = pBase->macAddr[i]; in v4kEepromGet()
49 sum += pBase->macAddr[i]; in v4kEepromGet()
58 return pBase->regDmn[0]; in v4kEepromGet()
[all …]
|
| H A D | ah_eeprom_9287.c | 1 /*-
2 * SPDX-License-Identifier: ISC
31 #define IS_VERS(op, v) ((pBase->version & AR5416_EEP_VER_MINOR_MASK) op (v)) in v9287EepromGet()
32 HAL_EEPROM_9287 *ee = AH_PRIVATE(ah)->ah_eeprom; in v9287EepromGet()
33 const MODAL_EEP_9287_HEADER *pModal = &ee->ee_base.modalHeader; in v9287EepromGet()
34 const BASE_EEP_9287_HEADER *pBase = &ee->ee_base.baseEepHeader; in v9287EepromGet()
41 *(int16_t *)val = pModal->noiseFloorThreshCh[0]; in v9287EepromGet()
47 macaddr[i] = pBase->macAddr[i]; in v9287EepromGet()
48 sum += pBase->macAddr[i]; in v9287EepromGet()
57 return pBase->regDmn[0]; in v9287EepromGet()
[all …]
|
| /freebsd/contrib/llvm-project/libcxx/include/__bit/ |
| H A D | endian.h | 1 //===----------
22 enum class endian { global() enum
26 native = little global() enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/DebugInfo/PDB/Native/ |
| H A D | InjectedSourceStream.cpp | 1 //===- InjectedSourceStream.cpp - PDB Headerblock Stream Access --------
[all...] |