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/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dbrcm,brcmnand.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom STB NAND Controller
10 - Brian Norris <computersforpeace@gmail.com>
11 - Kamal Dasu <kdasu.kdev@gmail.com>
12 - William Zhang <william.zhang@broadcom.com>
15 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
16 flash chips. It has a memory-mapped register interface for both control
27 -- Additional SoC-specific NAND controller properties --
[all …]
H A Dbrcm,brcmnand.txt1 * Broadcom STB NAND Controller
3 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
4 flash chips. It has a memory-mapped register interface for both control
15 - compatible : May contain an SoC-specific compatibility string (see below)
16 to account for any SoC-specific hardware bits that may be
19 the core NAND controller, of the following form:
21 string, like "brcm,brcmnand-v7.0"
23 brcm,brcmnand-v2.1
24 brcm,brcmnand-v2.2
25 brcm,brcmnand-v4.0
[all …]
H A Dmtk-nand.txt1 MTK SoCs NAND FLASH controller (NFC) DT binding
3 This file documents the device tree bindings for MTK SoCs NAND controllers.
5 the nand controller interface driver and the ECC engine driver.
10 1) NFC NAND Controller Interface (NFI):
13 The first part of NFC is NAND Controller Interface (NFI) HW.
15 - compatible: Should be one of
16 "mediatek,mt2701-nfc",
17 "mediatek,mt2712-nfc",
18 "mediatek,mt7622-nfc".
19 - reg: Base physical address and size of NFI.
[all …]
/freebsd/sys/contrib/device-tree/src/mips/brcm/
H A Dbcm97xxx-nand-cs1-bch24.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 &nand {
6 nand-on-flash-bbt;
8 nand-ecc-strength = <24>;
9 nand-ecc-step-size = <1024>;
10 brcm,nand-oob-sector-size = <27>;
13 compatible = "fixed-partitions";
14 #address-cells = <1>;
15 #size-cells = <1>;
H A Dbcm97xxx-nand-cs1-bch4.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 &nand {
6 nand-on-flash-bbt;
8 nand-ecc-strength = <4>;
9 nand-ecc-step-size = <512>;
10 brcm,nand-oob-sector-size = <16>;
13 compatible = "fixed-partitions";
14 #address-cells = <1>;
15 #size-cells = <1>;
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm963138dvt.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
16 stdout-path = &serial0;
35 brcm,wp-not-connected;
40 nand-ecc-strength = <4>;
41 nand-ecc-step-size = <512>;
42 brcm,nand-oob-sector-size = <16>;
43 nand-on-flash-bbt;
H A Dbcm958300k.dts33 /dts-v1/;
35 #include "bcm-cygnus.dtsi"
47 stdout-path = "serial0:115200n8";
64 nand@1 {
67 nand-on-flash-bbt;
69 #address-cells = <1>;
70 #size-cells = <1>;
72 nand-ecc-strength = <24>;
73 nand-ecc-step-size = <1024>;
75 brcm,nand-oob-sector-size = <27>;
H A Dbcm958305k.dts33 /dts-v1/;
35 #include "bcm-cygnus.dtsi"
47 stdout-path = "serial0:115200n8";
72 nand@1 {
75 nand-on-flash-bbt;
77 #address-cells = <1>;
78 #size-cells = <1>;
80 nand-ecc-strength = <24>;
81 nand-ecc-step-size = <1024>;
83 brcm,nand-oob-sector-size = <27>;
H A Dbcm911360_entphn.dts33 /dts-v1/;
35 #include "bcm-cygnus.dtsi"
36 #include "dt-bindings/input/input.h"
47 stdout-path = "serial0:115200n8";
50 gpio-keys {
51 compatible = "gpio-keys";
53 button-hook {
74 assigned-clocks =
77 assigned-clock-rates = <525000000>, <300000000>;
86 nand@1 {
[all …]
H A Dbcm958625-meraki-mx6x-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
8 #include "bcm-nsp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
14 pwm-leds {
15 compatible = "pwm-leds";
17 led-1 {
21 max-brightness = <255>;
[all …]
H A Dbcm958522er.dts33 /dts-v1/;
35 #include "bcm-nsp.dtsi"
36 #include <dt-bindings/gpio/gpio.h>
43 stdout-path = "serial0:115200n8";
51 gpio-restart {
52 compatible = "gpio-restart";
54 open-source;
78 nand@0 {
81 nand-on-flash-bbt;
83 #address-cells = <1>;
[all …]
H A Dbcm958525er.dts33 /dts-v1/;
35 #include "bcm-nsp.dtsi"
36 #include <dt-bindings/gpio/gpio.h>
43 stdout-path = "serial0:115200n8";
51 gpio-restart {
52 compatible = "gpio-restart";
54 open-source;
78 nand@0 {
81 nand-on-flash-bbt;
83 #address-cells = <1>;
[all …]
H A Dbcm958622hr.dts33 /dts-v1/;
35 #include "bcm-nsp.dtsi"
36 #include <dt-bindings/gpio/gpio.h>
43 stdout-path = "serial0:115200n8";
51 gpio-restart {
52 compatible = "gpio-restart";
54 open-source;
82 nand@0 {
85 nand-on-flash-bbt;
87 #address-cells = <1>;
[all …]
H A Dbcm958525xmc.dts33 /dts-v1/;
35 #include "bcm-nsp.dtsi"
36 #include <dt-bindings/gpio/gpio.h>
43 stdout-path = "serial0:115200n8";
51 gpio-restart {
52 compatible = "gpio-restart";
54 open-source;
76 temperature-sensor@4c {
94 nand@0 {
97 nand-on-flash-bbt;
[all …]
H A Dbcm958625hr.dts33 /dts-v1/;
35 #include "bcm-nsp.dtsi"
36 #include <dt-bindings/gpio/gpio.h>
43 stdout-path = "serial0:115200n8";
51 gpio-restart {
52 compatible = "gpio-restart";
54 open-source;
60 i2c-bus = <&i2c0>;
61 mod-def0-gpios = <&gpioa 28 GPIO_ACTIVE_LOW>;
62 los-gpios = <&gpioa 24 GPIO_ACTIVE_HIGH>;
[all …]
H A Dbcm958623hr.dts33 /dts-v1/;
35 #include "bcm-nsp.dtsi"
36 #include <dt-bindings/gpio/gpio.h>
43 stdout-path = "serial0:115200n8";
51 gpio-restart {
52 compatible = "gpio-restart";
54 open-source;
82 nand@0 {
85 nand-on-flash-bbt;
87 #address-cells = <1>;
[all …]
H A Dbcm988312hr.dts33 /dts-v1/;
35 #include "bcm-nsp.dtsi"
36 #include <dt-bindings/gpio/gpio.h>
43 stdout-path = "serial0:115200n8";
51 gpio-restart {
52 compatible = "gpio-restart";
54 open-source;
82 nand@0 {
85 nand-on-flash-bbt;
87 #address-cells = <1>;
[all …]
H A Dbcm958625k.dts33 /dts-v1/;
35 #include "bcm-nsp.dtsi"
42 stdout-path = "serial0:115200n8";
72 nand@0 {
75 nand-on-flash-bbt;
77 #address-cells = <1>;
78 #size-cells = <1>;
80 nand-ecc-strength = <24>;
81 nand-ecc-step-size = <1024>;
83 brcm,nand-oob-sector-size = <27>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/stingray/
H A Dbcm958742-base.dtsi4 * Copyright(c) 2016-2017 Broadcom. All rights reserved.
33 #include "stingray-board-base.dtsi"
37 compatible = "regulator-gpio";
38 regulator-name = "sdio0_vddo_ctrl_reg";
39 regulator-type = "voltage";
40 regulator-min-microvolt = <1800000>;
41 regulator-max-microvolt = <3300000>;
48 compatible = "regulator-gpio";
49 regulator-name = "sdio1_vddo_ctrl_reg";
50 regulator-type = "voltage";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/northstar2/
H A Dns2-xmc.dts33 /dts-v1/;
39 compatible = "brcm,ns2-xmc", "brcm,ns2";
46 stdout-path = "serial0:115200n8";
70 gphy0: eth-phy@10 {
76 &nand {
80 nand-ecc-mode = "hw";
81 nand-ecc-strength = <8>;
82 nand-ecc-step-size = <512>;
83 nand-bus-width = <16>;
84 brcm,nand-oob-sector-size = <16>;
[all …]
H A Dns2-svk.dts33 /dts-v1/;
39 compatible = "brcm,ns2-svk", "brcm,ns2";
49 stdout-path = "serial0:115200n8";
113 spi-max-frequency = <5000000>;
114 spi-cpha;
115 spi-cpol;
117 pl022,slave-tx-disable = <0>;
118 pl022,com-mode = <0>;
119 pl022,rx-level-trig = <1>;
120 pl022,tx-level-trig = <1>;
[all …]