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/linux/arch/mips/include/asm/
H A Dunaligned-emul.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 __asm__ __volatile__ (".set\tnoat\n" \
11 "1:\t"type##_lb("%0", "0(%2)")"\n" \
12 "2:\t"type##_lbu("$1", "1(%2)")"\n\t"\
13 "sll\t%0, 0x8\n\t" \
14 "or\t%0, $1\n\t" \
15 "li\t%1, 0\n" \
16 "3:\t.set\tat\n\t" \
17 ".insn\n\t" \
18 ".section\t.fixup,\"ax\"\n\t" \
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H A Dfutex.h6 * Copyright (c) 2006 Ralf Baechle (ralf@linux-mips.org)
15 #include <asm/asm-eva.h>
23 #include <asm-generic/futex.h>
29 " .set push \n" \
30 " .set noat \n" \
31 " .set push \n" \
32 " .set arch=r4000 \n" \
33 "1: ll %1, %4 # __futex_atomic_op \n" \
34 " .set pop \n" \
35 " " insn " \n" \
[all …]
/linux/include/linux/
H A Dlog2.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 * non-constant log of base 2 calculators
16 * - the arch may override these in asm/bitops.h if they can be implemented
18 * - the arch is not required to handle n==0 if implementing the fallback
22 int __ilog2_u32(u32 n) in __ilog2_u32() argument
24 return fls(n) - 1; in __ilog2_u32()
30 int __ilog2_u64(u64 n) in __ilog2_u64() argument
32 return fls64(n) - 1; in __ilog2_u64()
37 * is_power_of_2() - check if a value is a power of two
38 * @n: the value to check
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/linux/arch/mips/kernel/
H A Dmips-r2-to-r6-emul.c28 #include <asm/mips-r2-to-r6-emul.h>
63 mipsr2_emulation = 1; in mipsr2emu_enable()
65 pr_info("MIPS R2-to-R6 Emulator Enabled!"); in mipsr2emu_enable()
67 return 1; in mipsr2emu_enable()
72 * mipsr6_emul - Emulate some frequent R2/R5/R6 instructions in delay slot
83 regs->regs[MIPSInst_RT(ir)] = in mipsr6_emul()
84 (s32)regs->regs[MIPSInst_RS(ir)] + in mipsr6_emul()
92 regs->regs[MIPSInst_RT(ir)] = in mipsr6_emul()
93 (s64)regs->regs[MIPSInst_RS(ir)] + in mipsr6_emul()
101 return -SIGFPE; in mipsr6_emul()
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/linux/tools/include/linux/
H A Dlog2.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 * non-constant log of base 2 calculators
16 * - the arch may override these in asm/bitops.h if they can be implemented
18 * - the arch is not required to handle n==0 if implementing the fallback
21 int __ilog2_u32(u32 n) in __ilog2_u32() argument
23 return fls(n) - 1; in __ilog2_u32()
27 int __ilog2_u64(u64 n) in __ilog2_u64() argument
29 return fls64(n) - 1; in __ilog2_u64()
38 bool is_power_of_2(unsigned long n) in is_power_of_2() argument
40 return (n != 0 && ((n & (n - 1)) == 0)); in is_power_of_2()
[all …]
/linux/arch/arc/include/asm/
H A Duaccess.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
6 * -__clear_user( ) called multiple times during elf load was byte loop
10 * -Hand crafted constant propagation for "constant" copy sizes
11 * -stock kernel shrunk by 33K at -O3
14 * -Added option to (UN)inline copy_(to|from)_user to reduce code sz
15 * -kernel shrunk by 200K even at -O3 (gcc 4.2.1)
16 * -Enabled when doing -Os
32 case 1: __arc_get_user_one(*(k), u, "ldb", __ret); break; \
41 * Returns 0 on success, -EFAULT if not.
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/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "pinctrl-tegra.h"
23 #define TEGRA_PIN_PEX_L0_CLKREQ_N_PA1 _GPIO(1)
177 /* All non-GPIO pins follow */
178 #define NUM_GPIOS (TEGRA_PIN_QSPI_IO3_PEE5 + 1)
181 /* Non-GPIO pins */
183 #define TEGRA_PIN_CPU_PWR_REQ _PIN(1)
1267 #define PINGROUP_REG_A 0x3000 /* bank 1 */
1269 #define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
1270 #define PINGROUP_REG(r) ((r) - PINGROUP_REG_A)
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/linux/arch/csky/lib/
H A Dusercopy.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
8 unsigned long n) in raw_copy_from_user() argument
13 "0: cmpnei %1, 0 \n" in raw_copy_from_user()
14 " bf 7f \n" in raw_copy_from_user()
15 " mov %3, %1 \n" in raw_copy_from_user()
16 " or %3, %2 \n" in raw_copy_from_user()
17 " andi %3, 3 \n" in raw_copy_from_user()
18 " cmpnei %3, 0 \n" in raw_copy_from_user()
19 " bf 1f \n" in raw_copy_from_user()
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/linux/samples/ftrace/
H A Dftrace-direct-modify.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <asm/asm-offsets.h>
14 trace_printk("my direct func1\n"); in my_direct_func1()
19 trace_printk("my direct func2\n"); in my_direct_func2()
31 " .pushsection .text, \"ax\", @progbits\n"
32 " .type my_tramp1, @function\n"
33 " .globl my_tramp1\n"
34 " my_tramp1:\n"
35 " addi sp,sp,-2*"SZREG"\n"
36 " "REG_S" t0,0*"SZREG"(sp)\n"
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/linux/arch/nios2/mm/
H A Duaccess.c13 asm(".global raw_copy_from_user\n"
14 " .type raw_copy_from_user, @function\n"
15 "raw_copy_from_user:\n"
16 " movi r2,7\n"
17 " mov r3,r4\n"
18 " bge r2,r6,1f\n"
19 " xor r2,r4,r5\n"
20 " andi r2,r2,3\n"
21 " movi r7,3\n"
22 " beq r2,zero,4f\n"
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/linux/arch/x86/include/asm/
H A Dxor_32.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Optimized RAID-5 checksumming functions for MMX.
10 * High-speed RAID5 checksumming functions utilizing MMX instructions.
14 #define LD(x, y) " movq 8*("#x")(%1), %%mm"#y" ;\n"
15 #define ST(x, y) " movq %%mm"#y", 8*("#x")(%1) ;\n"
16 #define XO1(x, y) " pxor 8*("#x")(%2), %%mm"#y" ;\n"
17 #define XO2(x, y) " pxor 8*("#x")(%3), %%mm"#y" ;\n"
18 #define XO3(x, y) " pxor 8*("#x")(%4), %%mm"#y" ;\n"
19 #define XO4(x, y) " pxor 8*("#x")(%5), %%mm"#y" ;\n"
35 LD(i + 1, 1) \ in xor_pII_mmx_2()
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/linux/arch/s390/lib/
H A Dxor.c1 // SPDX-License-Identifier: GPL-2.0
18 " aghi %0,-1\n" in xor_xc_2()
19 " jm 3f\n" in xor_xc_2()
20 " srlg 0,%0,8\n" in xor_xc_2()
21 " ltgr 0,0\n" in xor_xc_2()
22 " jz 1f\n" in xor_xc_2()
23 "0: xc 0(256,%1),0(%2)\n" in xor_xc_2()
24 " la %1,256(%1)\n" in xor_xc_2()
25 " la %2,256(%2)\n" in xor_xc_2()
26 " brctg 0,0b\n" in xor_xc_2()
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/linux/arch/m68k/lib/
H A Dchecksum.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
19 * length-counter instead of the length counter
20 * (%1). Thanks to Roman Hodek for pointing this out.
22 * data-registers to hold input values and one tries to
43 * is aligned on either a 2-byte or 4-byte boundary. in csum_partial()
45 __asm__("movel %2,%3\n\t" in csum_partial()
46 "btst #1,%3\n\t" /* Check alignment */ in csum_partial()
47 "jeq 2f\n\t" in csum_partial()
48 "subql #2,%1\n\t" /* buff%4==2: treat first word */ in csum_partial()
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/linux/tools/testing/selftests/cpufreq/
H A Dmodule.sh2 # SPDX-License-Identifier: GPL-2.0
18 # $1: module
21 printf "** Test: Running ${FUNCNAME[0]} **\n\n"
23 printf "Inserting $1 module\n"
25 insmod $1
27 ktap_exit_fail_msg "Insmod $1 failed\n"
30 printf "Removing $1 module\n"
32 rmmod $1
34 ktap_exit_fail_msg "rmmod $1 failed\n"
37 printf "\n"
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H A Dcpufreq.sh2 # SPDX-License-Identifier: GPL-2.0
14 # $1: cpu
17 if [ ! -d $CPUROOT/$1/cpufreq ]; then
18 printf "Warning: No cpufreq directory present for $1\n"
24 if [ -d $CPUROOT/$1/cpufre
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/linux/arch/alpha/include/asm/
H A Dspinlock.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 #define arch_spin_is_locked(x) ((x)->lock != 0)
27 lock->lock = 0; in arch_spin_unlock()
35 "1: ldl_l %0,%1\n" in arch_spin_lock()
36 " bne %0,2f\n" in arch_spin_lock()
37 " lda %0,1\n" in arch_spin_lock()
38 " stl_c %0,%1\n" in arch_spin_lock()
39 " beq %0,2f\n" in arch_spin_lock()
40 " mb\n" in arch_spin_lock()
41 ".subsection 2\n" in arch_spin_lock()
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/linux/tools/testing/selftests/x86/
H A Dtest_FCOMI.c1 // SPDX-License-Identifier: GPL-2.0
3 #define _GNU_SOURCE 1
5 #define __USE_GNU 1
18 CF = 1 << 0,
19 PF = 1 << 2,
20 ZF = 1 << 6,
28 /* sNaN is s|111 1111 1|1xx xxxx xxxx xxxx xxxx xxxx */
29 /* qNaN is s|111 1111 1|0xx xxxx xxxx xxxx xxxx xxxx (some x must be nonzero) */
40 asm ("\n" in test()
42 " push %0""\n" in test()
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/linux/arch/xtensa/include/asm/
H A Dchecksum.h2 * include/asm-xtensa/checksum.h
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
20 * and adds in "sum" (32-bit)
22 * returns a 32-bit number suitable for feeding into itself
28 * it's best to have buff aligned on a 32-bit boundary
34 * checksums, and handles user-space pointer exceptions correctly, when needed.
36 * here even more important to align src and dst on a 32-bit (or even
37 * better 64-bit) boundary
70 __asm__("extui %1, %0, 16, 16\n\t" in csum_fold()
71 "extui %0 ,%0, 0, 16\n\t" in csum_fold()
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/linux/arch/sh/include/asm/
H A Dspinlock-llsc.h1 /* SPDX-License-Identifier: GPL-2.0
3 * include/asm-sh/spinlock-llsc.h
18 #define arch_spin_is_locked(x) ((x)->lock <= 0)
32 "1: \n\t" in arch_spin_lock()
33 "movli.l @%2, %0 ! arch_spin_lock \n\t" in arch_spin_lock()
34 "mov %0, %1 \n\t" in arch_spin_lock()
35 "mov #0, %0 \n\t" in arch_spin_lock()
36 "movco.l %0, @%2 \n\t" in arch_spin_lock()
37 "bf 1b \n\t" in arch_spin_lock()
38 "cmp/pl %1 \n\t" in arch_spin_lock()
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H A Dbitops-grb.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 mask = 1 << (nr & 0x1f); in set_bit()
15 " .align 2 \n\t" in set_bit()
16 " mova 1f, r0 \n\t" /* r0 = end point */ in set_bit()
17 " mov r15, r1 \n\t" /* r1 = saved sp */ in set_bit()
18 " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ in set_bit()
19 " mov.l @%1, %0 \n\t" /* load old value */ in set_bit()
20 " or %2, %0 \n\t" /* or */ in set_bit()
21 " mov.l %0, @%1 \n\t" /* store new value */ in set_bit()
22 "1: mov r1, r15 \n\t" /* LOGOUT */ in set_bit()
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/linux/tools/bpf/bpftool/
H A Dgen.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
51 if (str[n1 - i - 1] != suffix[n2 - in str_has_suffix()
97 int i, n; get_map_ident() local
121 int i, n; get_datasec_ident() local
237 int n = btf__type_cnt(btf), i; find_type_for_map() local
411 int skip_tabs = 0, n; codegen() local
973 int i, err = 0, n; walk_st_ops_shadow_vars() local
2435 unsigned int i, n = btf__type_cnt(info->marked_btf); btfgen_get_btf() local
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/linux/arch/arm/mm/
H A Dcopypage-feroceon.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mm/copypage-feroceon.S
18 .arch armv5te \n\ in feroceon_copy_user_page()
19 1: ldmia %1!, {r2 - r7, ip, lr} \n\ in feroceon_copy_user_page()
20 pld [%1, #0] \n\ in feroceon_copy_user_page()
21 pld [%1, #32] \n\ in feroceon_copy_user_page()
22 pld [%1, #64] \n\ in feroceon_copy_user_page()
23 pld [%1, #96] \n\ in feroceon_copy_user_page()
24 pld [%1, #128] \n\ in feroceon_copy_user_page()
25 pld [%1, #160] \n\ in feroceon_copy_user_page()
[all …]
/linux/drivers/video/fbdev/
H A Datafb_utils.h1 /* SPDX-License-Identifier: GPL-2.0 */
22 * would be faster. I suspect not for simple text system - not much
30 * Unaligned read/write used requires 68020+ - think this is a problem?
39 * For other modes than 1 plane, lots of more such assembler functions
44 subl #65536,d0 replaced by clrw d0; subql #1,d0 for dbcc
54 asm volatile ("\n" in fb_memclear_small()
55 " lsr.l #1,%1 ; jcc 1f ; move.b %2,-(%0)\n" in fb_memclear_small()
56 "1: lsr.l #1,%1 ; jcc 1f ; move.w %2,-(%0)\n" in fb_memclear_small()
57 "1: lsr.l #1,%1 ; jcc 1f ; move.l %2,-(%0)\n" in fb_memclear_small()
58 "1: lsr.l #1,%1 ; jcc 1f ; move.l %2,-(%0) ; move.l %2,-(%0)\n" in fb_memclear_small()
[all …]
/linux/tools/testing/selftests/net/forwarding/
H A Dfib_offload_lib.sh1 # SPDX-License-Identifier: GPL-2.0
7 local ns=$1; shift
8 local family=$1; shift
9 local route=$1; shift
10 local should_fail=$1; shift
13 ip -n $ns -j -p -$family route show $route \
14 | jq -e '.[]["flags"] | contains(["trap"])' &> /dev/null
17 if [[ $ret -ne 0 ]]; then
20 return 1
29 local ns=$1; shift
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/linux/arch/mips/mm/
H A Dsc-ip22.c1 // SPDX-License-Identifier: GPL-2.0
3 * sc-ip22.c: Indy cache management functions.
26 #define CI_MASK (SC_SIZE - SC_LINE)
27 #define SC_INDEX(n) ((n) & CI_MASK) argument
34 " .set push # indy_sc_wipe \n" in indy_sc_wipe()
35 " .set noreorder \n" in indy_sc_wipe()
36 " .set mips3 \n" in indy_sc_wipe()
37 " .set noat \n" in indy_sc_wipe()
38 " mfc0 %2, $12 \n" in indy_sc_wipe()
39 " li $1, 0x80 # Go 64 bit \n" in indy_sc_wipe()
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