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/linux/Documentation/i2c/
H A Di2c-topology.rst2 I2C muxes and complex topologies
19 Several types of hardware components such as I2C muxes, I2C gates and I2C
39 There are two variants of locking available to I2C muxes, they can be
40 mux-locked or parent-locked muxes.
43 Mux-locked muxes
46 Mux-locked muxes does not lock the entire parent adapter during the
47 full select-transfer-deselect transaction, only the muxes on the parent
48 adapter are locked. Mux-locked muxes are mostly interesting if the
72 2. M1 locks muxes on its parent (the root adapter in this case).
81 8. M1 unlocks muxes on its parent.
[all …]
/linux/drivers/dma/
H A Dlpc18xx-dmamux.c35 struct lpc18xx_dmamux *muxes; member
87 if (dmamux->muxes[mux].busy) { in lpc18xx_dmamux_reserve()
90 mux, mux, dmamux->muxes[mux].value); in lpc18xx_dmamux_reserve()
95 dmamux->muxes[mux].busy = true; in lpc18xx_dmamux_reserve()
96 dmamux->muxes[mux].value = dma_spec->args[1]; in lpc18xx_dmamux_reserve()
100 LPC18XX_DMAMUX_VAL(dmamux->muxes[mux].value, mux)); in lpc18xx_dmamux_reserve()
107 dmamux->muxes[mux].value, mux); in lpc18xx_dmamux_reserve()
109 return &dmamux->muxes[mux]; in lpc18xx_dmamux_reserve()
149 dmamux->muxes = devm_kcalloc(&pdev->dev, dmamux->dma_master_requests, in lpc18xx_dmamux_probe()
152 if (!dmamux->muxes) in lpc18xx_dmamux_probe()
/linux/drivers/clk/mvebu/
H A Dkirkwood.c256 struct clk **muxes; member
282 to_clk_mux(__clk_get_hw(ctrl->muxes[n])); in clk_muxing_get_src()
284 return ctrl->muxes[n]; in clk_muxing_get_src()
307 /* Count, allocate, and register clock muxes */ in kirkwood_clk_muxing_setup()
312 ctrl->muxes = kcalloc(ctrl->num_muxes, sizeof(struct clk *), in kirkwood_clk_muxing_setup()
314 if (WARN_ON(!ctrl->muxes)) in kirkwood_clk_muxing_setup()
318 ctrl->muxes[n] = clk_register_mux(NULL, desc[n].name, in kirkwood_clk_muxing_setup()
322 WARN_ON(IS_ERR(ctrl->muxes[n])); in kirkwood_clk_muxing_setup()
/linux/Documentation/devicetree/bindings/mux/
H A Dadi,adg792a.txt5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
6 with a single mux controller controlling all three muxes), or <1> if
53 * Three parallel muxes with one mux controller, useful e.g. if
/linux/drivers/clk/mediatek/
H A Dclk-mux.c217 const struct mtk_mux *muxes, in mtk_clk_register_muxes() argument
233 const struct mtk_mux *mux = &muxes[i]; in mtk_clk_register_muxes()
256 const struct mtk_mux *mux = &muxes[i]; in mtk_clk_register_muxes()
269 void mtk_clk_unregister_muxes(const struct mtk_mux *muxes, int num, in mtk_clk_unregister_muxes() argument
278 const struct mtk_mux *mux = &muxes[i - 1]; in mtk_clk_unregister_muxes()
H A Dclk-mux.h122 const struct mtk_mux *muxes,
127 void mtk_clk_unregister_muxes(const struct mtk_mux *muxes, int num,
/linux/drivers/pinctrl/nuvoton/
H A Dpinctrl-ma35.h23 struct ma35_mux_desc *muxes; member
38 .muxes = (struct ma35_mux_desc[]) { \
/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt8188-sys-clock.yaml16 muxes
21 The topckgen provides dividers and muxes which provide the clock source to other IP blocks.
H A Dmediatek,mt8186-sys-clock.yaml16 muxes
21 The topckgen provides dividers and muxes which provide the clock source to other IP blocks.
H A Drockchip,rk3588-cru.yaml49 for GRF muxes, if missing any muxes present in the GRF will not be
H A Dmediatek,mt8195-sys-clock.yaml16 muxes
21 The topckgen provides dividers and muxes which provide the clock source to other IP blocks.
H A Drockchip,rk3399-cru.yaml58 for GRF muxes, if missing any muxes present in the GRF will not be
H A Dqcom,krait-cc.txt20 Definition: reference to the clock parents of hfpll, secondary muxes.
/linux/Documentation/firmware-guide/acpi/
H A Di2c-muxes.rst4 ACPI I2C Muxes
7 Describing an I2C device hierarchy that includes I2C muxes requires an ACPI
H A Dindex.rst24 i2c-muxes
/linux/drivers/clk/samsung/
H A Dclk-exynos850.c244 /* List of parent clocks for Muxes in CMU_TOP */
248 /* List of parent clocks for Muxes in CMU_TOP: for CMU_APM */
250 /* List of parent clocks for Muxes in CMU_TOP: for CMU_AUD */
253 /* List of parent clocks for Muxes in CMU_TOP: for CMU_CORE */
264 /* List of parent clocks for Muxes in CMU_TOP: for CMU_CPUCL0 */
268 /* List of parent clocks for Muxes in CMU_TOP: for CMU_CPUCL1 */
272 /* List of parent clocks for Muxes in CMU_TOP: for CMU_G3D */
275 /* List of parent clocks for Muxes in CMU_TOP: for CMU_HSI */
283 /* List of parent clocks for Muxes in CMU_TOP: for CMU_IS */
292 /* List of parent clocks for Muxes in CMU_TOP: for CMU_MFCMSCL */
[all …]
H A Dclk-exynos7.c44 /* List of parent clocks for Muxes in CMU_TOPC */
229 /* List of parent clocks for Muxes in CMU_TOP0 */
418 /* List of parent clocks for Muxes in CMU_TOP1 */
592 * List of parent clocks for Muxes in CMU_CCORE
634 /* List of parent clocks for Muxes in CMU_PERIC0 */
703 /* List of parent clocks for Muxes in CMU_PERIC1 */
827 /* List of parent clocks for Muxes in CMU_PERIS */
886 * List of parent clocks for Muxes in CMU_FSYS0
997 * List of parent clocks for Muxes in CMU_FSYS1
1121 /* List of parent clocks for Muxes in CMU_MSCL */
[all …]
H A Dclk-exynos7885.c165 /* List of parent clocks for Muxes in CMU_TOP */
169 /* List of parent clocks for Muxes in CMU_TOP: for CMU_CORE */
177 /* List of parent clocks for Muxes in CMU_TOP: for CMU_PERI */
188 /* List of parent clocks for Muxes in CMU_TOP: for CMU_FSYS */
459 /* List of parent clocks for Muxes in CMU_PERI */
621 /* List of parent clocks for Muxes in CMU_CORE */
741 /* List of parent clocks for Muxes in CMU_FSYS */
/linux/drivers/net/ethernet/mediatek/
H A Dmtk_eth_path.c259 /* Setup proper MUXes along the path */ in mtk_gmac_sgmii_path_setup()
273 /* Setup proper MUXes along the path */ in mtk_gmac_gephy_path_setup()
284 /* Setup proper MUXes along the path */ in mtk_gmac_rgmii_path_setup()
/linux/drivers/comedi/drivers/ni_routing/
H A Dni_route_values.h80 * shares the same register values for the various signal MUXes. It
83 * @register_values: Table of all register values for various signal MUXes on
/linux/drivers/i2c/
H A DKconfig64 source "drivers/i2c/muxes/Kconfig"
73 i2c-muxes do.
/linux/include/dt-bindings/pinctrl/
H A Drzn1-pinctrl.h15 * muxes are all represented by one single value.
22 * 72...103 are for the 2 MDIO muxes.
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,dove-pinctrl.txt88 * group "audio0" internally muxes i2s0 or ac97 controller to the dedicated
90 * group "twsi" internally muxes twsi controller to the dedicated or option pins.
/linux/include/dt-bindings/clock/
H A Dingenic,jz4740-cgu.h8 * - muxes/dividers in the order they appear in the jz4740 programmers manual
H A Dexynos3250.h33 /* Muxes */
266 /* Muxes */

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