Searched +full:multicast +full:- +full:filter +full:- +full:bins (Results 1 – 14 of 14) sorted by relevance
/linux/Documentation/devicetree/bindings/net/ |
H A D | sophgo,cv1800b-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/sophgo,cv1800b-dwmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inochi Amaoto <inochiama@gmail.com> 17 - sophgo,cv1800b-dwmac 19 - compatible 24 - const: sophgo,cv1800b-dwmac 25 - const: snps,dwmac-3.70a 32 - description: GMAC main clock [all …]
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H A D | sophgo,sg2044-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/sophgo,sg2044-dwmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inochi Amaoto <inochiama@gmail.com> 17 - sophgo,sg2044-dwmac 18 - sophgo,sg2042-dwmac 20 - compatible 25 - items: 26 - const: sophgo,sg2042-dwmac [all …]
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H A D | starfive,jh7110-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Emil Renner Berthing <kernel@esmil.dk> 12 - Samin Guo <samin.guo@starfivetech.com> 19 - starfive,jh7100-dwmac 20 - starfive,jh7110-dwmac 22 - compatible 27 - items: [all …]
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/linux/arch/arm64/boot/dts/intel/ |
H A D | socfpga_agilex.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 7 #include <dt-bindings/reset/altr,rst-mgr-s10.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/agilex-clock.h> 13 compatible = "intel,socfpga-agilex"; 14 #address-cells = <2>; 15 #size-cells = <2>; 17 reserved-memory { [all …]
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/linux/arch/arm64/boot/dts/altera/ |
H A D | socfpga_stratix10.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 7 #include <dt-bindings/reset/altr,rst-mgr-s10.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/stratix10-clock.h> 12 compatible = "altr,socfpga-stratix10"; 13 #address-cells = <2>; 14 #size-cells = <2>; 16 reserved-memory { 17 #address-cells = <2>; [all …]
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/linux/arch/arm/boot/dts/renesas/ |
H A D | r9a06g032.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 18 #address-cells = <1>; 19 #size-cells = <0>; 23 compatible = "arm,cortex-a7"; 30 compatible = "arm,cortex-a7"; 33 enable-method = "renesas,r9a06g032-smp"; [all …]
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/linux/drivers/net/ethernet/qlogic/qed/ |
H A D | qed_l2.c | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 11 #include <linux/dma-mapping.h> 63 return -ENOMEM; in qed_l2_alloc() 64 p_hwfn->p_l2_info = p_l2_info; in qed_l2_alloc() 66 if (IS_PF(p_hwfn->cdev)) { in qed_l2_alloc() 67 p_l2_info->queues = RESC_NUM(p_hwfn, QED_L2_QUEUE); in qed_l2_alloc() 74 p_l2_info->queues = max_t(u8, rx, tx); in qed_l2_alloc() 77 pp_qids = kcalloc(p_l2_info->queues, sizeof(unsigned long *), in qed_l2_alloc() [all …]
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H A D | qed_l2.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 85 /* MOVE is not supported for multicast */ 192 u32 bins[8]; member 240 * Note At the moment - only used by non-linux VFs. 269 * @is_atomic: Hint from the caller - if the func can sleep or not. 298 * or remove arfs hw filter 332 /* 0-based queue index. Should reflect the relative qzone the 338 * - Producers would be placed in a different place. [all …]
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/linux/arch/arc/boot/dts/ |
H A D | axs10x_mb.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 14 compatible = "simple-bus"; 15 #address-cells = <1>; 16 #size-cells = <1>; 18 interrupt-parent = <&mb_intc>; 20 creg_rst: reset-controller@11220 { 21 compatible = "snps,axs10x-reset"; 22 #reset-cells = <1>; 27 compatible = "snps,axs10x-i2s-pll-clock"; [all …]
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H A D | hsdk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/reset/snps,hsdk-reset.h> 18 #address-cells = <2>; 19 #size-cells = <2>; 22 … "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1"; 30 #address-cells = <1>; 31 #size-cells = <0>; 62 input_clk: input-clk { [all …]
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/linux/arch/arm/boot/dts/intel/socfpga/ |
H A D | socfpga.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/reset/altr,rst-mgr.h> 9 #address-cells = <1>; 10 #size-cells = <1>; 22 #address-cells = <1>; 23 #size-cells = <0>; 24 enable-method = "altr,socfpga-smp"; 27 compatible = "arm,cortex-a9"; 30 next-level-cache = <&L2>; 33 compatible = "arm,cortex-a9"; [all …]
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/linux/arch/riscv/boot/dts/sophgo/ |
H A D | cv180x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/clock/sophgo,cv1800.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include "cv18xx-reset.h" 13 #address-cells = <1>; 14 #size-cells = <1>; 17 compatible = "fixed-clock"; 18 clock-output-names = "osc_25m"; 19 #clock-cells = <0>; [all …]
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H A D | sg2044.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/clock/sophgo,sg2044-pll.h> 7 #include <dt-bindings/clock/sophgo,sg2044-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/pinctrl/pinctrl-sg2044.h> 12 #include "sg2044-cpus.dtsi" 13 #include "sg2044-reset.h" 24 compatible = "fixed-clock"; 25 clock-output-names = "osc"; [all …]
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/linux/drivers/net/wireless/ath/ath10k/ |
H A D | wmi.h | 1 /* SPDX-License-Identifier: ISC */ 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 6 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 29 * 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff 45 * variable is already 4-byte aligned by virtue of being a u32 527 * for wmi_services is 64 as target is using only 4-bits of each 32-bit 533 __le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \ 534 BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4)) [all …]
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