Searched +full:mtk +full:- +full:cirq (Results 1 – 4 of 4) sorted by relevance
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | mediatek,mtk-cirq.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/mediatek,mtk-cirq.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Youlin Pei <youlin.pei@mediatek.com> 13 In MediaTek SoCs, the CIRQ is a low power interrupt controller designed to 14 work outside of MCUSYS which comprises with Cortex-Ax cores, CCI and GIC. 15 The external interrupts (outside MCUSYS) will feed through CIRQ and connect 16 to GIC in MCUSYS. When CIRQ is enabled, it will record the edge-sensitive 18 flush command is executed. With CIRQ, MCUSYS can be completely turned off [all …]
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| /linux/drivers/irqchip/ |
| H A D | irq-mtk-cirq.c | 1 // SPDX-License-Identifier: GPL-2.0-only 71 return chip_data->base + chip_data->offsets[idx]; in mtk_cirq_reg() 83 struct mtk_cirq_chip_data *chip_data = data->chip_data; in mtk_cirq_write_mask() 84 unsigned int cirq_num = data->hwirq; in mtk_cirq_write_mask() 127 data = data->parent_data; in mtk_cirq_set_type() 128 ret = data->chip->irq_set_type(data, type); in mtk_cirq_set_type() 149 if (is_of_node(fwspec->fwnode)) { in mtk_cirq_domain_translate() 150 if (fwspec->param_count != 3) in mtk_cirq_domain_translate() 151 return -EINVAL; in mtk_cirq_domain_translate() 154 if (fwspec->param[0] != 0) in mtk_cirq_domain_translate() [all …]
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| /linux/arch/arm/boot/dts/mediatek/ |
| H A D | mt2701.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt2701-clk.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/power/mt2701-power.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/memory/mt2701-larb-port.h> 14 #include <dt-bindings/reset/mt2701-resets.h> 15 #include "mt2701-pinfunc.h" 18 #address-cells = <2>; [all …]
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt8196-topckgen.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <dt-bindings/clock/mediatek,mt8196-clock.h> 17 #include "clk-mtk.h" 18 #include "clk-mux.h" 677 MUX_CLR_SET_UPD(CLK_TOP_CIRQ, "cirq", 969 { .compatible = "mediatek,mt8196-topckgen", .data = &topck_desc }, 978 .name = "clk-mt8196-topck",
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