Searched +full:mt8196 +full:- +full:pextp0cfg +full:- +full:ao (Results 1 – 2 of 2) sorted by relevance
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | mediatek,mt8196-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8196-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek Functional Clock Controller for MT8196
10 - Guangjie Song <guangjie.song@mediatek.com>
11 - Laura Nao <laura.nao@collabora.com>
15 PLLs -->
16 dividers -->
18 -->
[all …]
|
| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt8196-pextp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/clock/mediatek,mt8196-clock.h>
9 #include <dt-bindings/reset/mediatek,mt8196-resets.h>
11 #include <linux/clk-provider.h>
16 #include "clk-gate.h"
17 #include "clk-mtk.h"
114 { .compatible = "mediatek,mt8196-pextp0cfg-ao", .data = &pext_mcd },
115 { .compatible = "mediatek,mt8196-pextp1cfg-ao", .data = &pext1_mcd },
124 .name = "clk-mt8196-pextp",
130 MODULE_DESCRIPTION("MediaTek MT8196 PCIe transmit phy clocks driver");
|