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Searched +full:mt8195 +full:- +full:vdecsys (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/clk/mediatek/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
42 bool "Clock driver for MediaTek MT2701 vdecsys"
45 This driver supports MediaTek MT2701 vdecsys clocks.
116 tristate "Clock driver for MediaTek MT2712 vdecsys"
119 This driver supports MediaTek MT2712 vdecsys clocks.
151 tristate "Clock driver for MediaTek MT6735 vdecsys"
155 by vdecsys on the MediaTek MT6735 SoC.
283 tristate "Clock driver for MediaTek MT6779 vdecsys"
286 This driver supports MediaTek MT6779 vdecsys clocks.
331 tristate "Clock driver for MediaTek MT6795 VDECSYS"
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o rese…
3 obj-$(CONFIG_COMMON_CLK_MEDIATEK_FHCTL) += clk-fhctl.o clk-pllfh.o
5 obj-$(CONFIG_COMMON_CLK_MT6735) += clk-mt6735-apmixedsys.o clk-mt6735-infracfg.o clk-mt6735-pericfg…
6 obj-$(CONFIG_COMMON_CLK_MT6735_IMGSYS) += clk-mt6735-imgsys.o
7 obj-$(CONFIG_COMMON_CLK_MT6735_MFGCFG) += clk-mt6735-mfgcfg.o
8 obj-$(CONFIG_COMMON_CLK_MT6735_VDECSYS) += clk-mt6735-vdecsys.o
9 obj-$(CONFIG_COMMON_CLK_MT6735_VENCSYS) += clk-mt6735-vencsys.o
10 obj-$(CONFIG_COMMON_CLK_MT6765) += clk-mt6765.o
11 obj-$(CONFIG_COMMON_CLK_MT6765_AUDIOSYS) += clk-mt6765-audio.o
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H A Dclk-mt8195-vdec.c1 // SPDX-License-Identifier: GPL-2.0-only
4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
6 #include "clk-gate.h"
7 #include "clk-mtk.h"
9 #include <dt-bindings/clock/mt8195-clk.h>
10 #include <linux/clk-provider.h>
84 .compatible = "mediatek,mt8195-vdecsys",
87 .compatible = "mediatek,mt8195-vdecsys_core1",
90 .compatible = "mediatek,mt8195-vdecsys_soc",
102 .name = "clk-mt8195-vdec",
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/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt8195-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8195-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek Functional Clock Controller for MT8195
10 - Chun-Jie Chen <chun-jie.chen@mediatek.com>
14 PLLs -->
15 dividers -->
17 -->
26 - enum:
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmediatek,smi-larb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yong Wu <yong.wu@mediatek.com>
19 - enum:
20 - mediatek,mt2701-smi-larb
21 - mediatek,mt2712-smi-larb
22 - mediatek,mt6779-smi-larb
23 - mediatek,mt6795-smi-larb
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