/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8195-clk.h> 9 #include <dt-bindings/gce/mt8195-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8195-memory-port.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 15 #include <dt-bindings/power/mt8195-power.h> [all …]
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H A D | mt8188.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 /dts-v1/; 8 #include <dt-bindings/clock/mediatek,mt8188-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/mailbox/mediatek,mt8188-gce.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> 14 #include <dt-bindings/power/mediatek,mt8188-power.h> 15 #include <dt-bindings/reset/mt8188-resets.h> [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/ |
H A D | mediatek,mt8195-sys-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8195-sys-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek System Clock Controller for MT8195 10 - Chun-Jie Chen <chun-jie.chen@mediatek.com> 14 PLLs --> 15 dividers --> 17 --> 21 The topckgen provides dividers and muxes which provide the clock source to other IP blocks. [all …]
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | mediatek,mt8195-sys-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/mediatek,mt8195-sys-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek System Clock Controller for MT8195 10 - Chun-Jie Chen <chun-jie.chen@mediatek.com> 14 PLLs --> 15 dividers --> 17 --> 21 The topckgen provides dividers and muxes which provide the clock source to other IP blocks. [all …]
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/freebsd/sys/contrib/device-tree/Bindings/sound/ |
H A D | mt8195-afe-pcm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/mt8195 [all...] |
/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | mediatek-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/mediatek-dwma [all...] |
/freebsd/sys/contrib/device-tree/Bindings/dsp/ |
H A D | mediatek,mt8195-dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8195-dsp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek mt8195 DSP core 10 - YC Hung <yc.hung@mediatek.com> 13 Some boards from mt8195 contain a DSP core used for 14 advanced pre- and post- audio processing. 18 const: mediatek,mt8195-dsp 22 - description: Address and size of the DSP Cfg registers [all …]
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/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | spi-slave-mt27xx.txt | 4 - compatible: should be one of the following. 5 - mediatek,mt2712-spi-slave: for mt2712 platforms 6 - mediatek,mt8195-spi-slave: for mt8195 platforms 7 - reg: Address and length of the register set for the device. 8 - interrupts: Should contain spi interrupt. 9 - clocks: phandles to input clocks. 11 - clock-names: should be "spi" for the clock gate. 14 - assigned-clocks: it's mux clock, should be <&topckgen CLK_TOP_SPISLV_SEL>. 15 - assigned-clock-parents: parent of mux clock. 17 - <&topckgen CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ. [all …]
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H A D | spi-mt65xx.txt | 4 - compatible: should be one of the following. 5 - mediatek,mt2701-spi: for mt2701 platforms 6 - mediatek,mt2712-spi: for mt2712 platforms 7 - mediatek,mt6589-spi: for mt6589 platforms 8 - mediatek,mt6765-spi: for mt6765 platforms 9 - mediatek,mt7622-spi: for mt7622 platforms 10 - "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms 11 - mediatek,mt8135-spi: for mt8135 platforms 12 - mediatek,mt8173-spi: for mt8173 platforms 13 - mediatek,mt8183-spi: for mt8183 platforms [all …]
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H A D | mediatek,spi-slave-mt27xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/mediatek,spi-slave-mt27xx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Leilk Liu <leilk.liu@mediatek.com> 13 - $ref: /schemas/spi/spi-controller.yaml# 18 - mediatek,mt2712-spi-slave 19 - mediatek,mt8195-spi-slave 30 clock-names: 32 - const: spi [all …]
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H A D | mediatek,spi-mt65xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Leilk Liu <leilk.liu@mediatek.com> 13 - $ref: /schemas/spi/spi-controller.yaml# 18 - items: 19 - enum: 20 - mediatek,mt7629-spi 21 - mediatek,mt8365-spi [all …]
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H A D | mediatek,spi-mtk-nor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bayi Cheng <bayi.cheng@mediatek.com> 11 - Chuanhong Guo <gch981213@gmail.com> 21 - $ref: /schemas/spi/spi-controller.yaml# 26 - enum: 27 - mediatek,mt8173-nor 28 - mediatek,mt8186-nor [all …]
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/freebsd/sys/contrib/device-tree/Bindings/media/ |
H A D | mediatek,vcodec-subdev-decoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-subde [all...] |
H A D | mediatek-vcodec.txt | 7 - compatible : must be one of the following string: 8 "mediatek,mt8173-vcodec-enc-vp8" for mt8173 vp8 encoder. 9 "mediatek,mt8173-vcodec-enc" for mt8173 avc encoder. 10 "mediatek,mt8183-vcodec-enc" for MT8183 encoder. 11 "mediatek,mt8173-vcodec-dec" for MT8173 decoder. 12 "mediatek,mt8192-vcodec-enc" for MT8192 encoder. 13 "mediatek,mt8183-vcodec-dec" for MT8183 decoder. 14 "mediatek,mt8195-vcodec-enc" for MT8195 encoder. 15 - reg : Physical base address of the video codec registers and length of 17 - interrupts : interrupt number to the cpu. [all …]
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H A D | mediatek,vcodec-encoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yunfei Dong <yunfei.dong@mediatek.com> 20 - items: 21 - enum: 22 - mediatek,mt8173-vcodec-enc-vp8 23 - mediatek,mt8173-vcodec-enc 24 - mediatek,mt8183-vcodec-enc [all …]
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/freebsd/sys/contrib/device-tree/Bindings/power/ |
H A D | mediatek,power-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/mediatek,power-controlle [all...] |
/freebsd/sys/contrib/device-tree/Bindings/spmi/ |
H A D | mtk,spmi-mtk-pmif.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> 17 - $ref: spmi.yaml 22 - enum: 23 - mediatek,mt6873-spmi 24 - mediatek,mt8195-spmi 25 - items: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/usb/ |
H A D | mediatek,mtu3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-drd.yaml 23 - enum: 24 - mediatek,mt2712-mtu3 25 - mediatek,mt8173-mtu3 26 - mediatek,mt8183-mtu3 27 - mediatek,mt8186-mtu3 [all …]
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H A D | mediatek,mtk-xhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-xhci.yaml 19 case 2: supports dual-role mode, and the host is based on xHCI driver. 25 - enum: 26 - mediatek,mt2701-xhci 27 - mediatek,mt2712-xhci [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mmc/ |
H A D | mtk-sd.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chaotian Jing <chaotian.jing@mediatek.com> 11 - Wenbi [all...] |
/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/ |
H A D | mediatek,ethdr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
/freebsd/sys/contrib/device-tree/Bindings/pwm/ |
H A D | pwm-mediatek.txt | 4 - compatible: should be "mediatek,<name>-pwm": 5 - "mediatek,mt2712-pwm": found on mt2712 SoC. 6 - "mediatek,mt6795-pwm": found on mt6795 SoC. 7 - "mediatek,mt7622-pwm": found on mt7622 SoC. 8 - "mediatek,mt7623-pwm": found on mt7623 SoC. 9 - "mediatek,mt7628-pwm": found on mt7628 SoC. 10 - "mediatek,mt7629-pwm": found on mt7629 SoC. 11 - "mediatek,mt8183-pwm": found on mt8183 SoC. 12 - "mediatek,mt8195-pwm", "mediatek,mt8183-pwm": found on mt8195 SoC. 13 - "mediatek,mt8365-pwm": found on mt8365 SoC. [all …]
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H A D | mediatek,mt2712-pwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/mediatek,mt2712-pwm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - John Crispin <john@phrozen.org> 13 - $ref: pwm.yaml# 18 - enum: 19 - mediatek,mt2712-pwm 20 - mediatek,mt6795-pwm 21 - mediatek,mt7622-pwm [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pci/ |
H A D | mediatek-pcie-gen3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/mediatek-pcie-gen3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jianjun Wang <jianjun.wang@mediatek.com> 19 +-----+ 21 +-----+ 24 port->irq 26 +-+-+-+-+-+-+-+-+ 28 +-+-+-+-+-+-+-+-+ [all …]
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/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | mediatek,tphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: MediaTek T-PHY Controller 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 The T-PHY controller supports physical layer functionality for a number of 17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and 18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode: 19 ----------------------------------- 67 pattern: "^t-phy(@[0-9a-f]+)?$" [all …]
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