/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | spi-mtk-nor.txt | 4 - compatible: For mt8173, compatible should be "mediatek,mt8173-nor", 6 For every other SoC, should contain both the SoC-specific compatible 7 string and "mediatek,mt8173-nor". 9 "mediatek,mt2701-nor", "mediatek,mt8173-nor" 10 "mediatek,mt2712-nor", "mediatek,mt8173-nor" 11 "mediatek,mt7622-nor", "mediatek,mt8173-nor" 12 "mediatek,mt7623-nor", "mediatek,mt8173-nor" 13 "mediatek,mt7629-nor", "mediatek,mt8173-nor" 14 "mediatek,mt8173-nor" 15 - reg: physical base address and length of the controller's register [all …]
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H A D | spi-mt65xx.txt | 1 Binding for MTK SPI controller 4 - compatible: should be one of the following. 5 - mediatek,mt2701-spi: for mt2701 platforms 6 - mediatek,mt2712-spi: for mt2712 platforms 7 - mediatek,mt6589-spi: for mt6589 platforms 8 - mediatek,mt6765-spi: for mt6765 platforms 9 - mediatek,mt7622-spi: for mt7622 platforms 10 - "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms 11 - mediatek,mt8135-spi: for mt8135 platforms 12 - mediatek,mt8173-spi: for mt8173 platforms [all …]
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H A D | mediatek,spi-mtk-nor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bayi Cheng <bayi.cheng@mediatek.com> 11 - Chuanhong Guo <gch981213@gmail.com> 14 This spi controller support single, dual, or quad mode transfer for 15 SPI NOR flash. There should be only one spi slave device following 16 generic spi bindings. It's not recommended to use this controller 17 for devices other than SPI NOR flash due to limited transfer [all …]
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H A D | mediatek,spi-mt65xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SPI Bus controller for MediaTek ARM SoCs 10 - Leilk Liu <leilk.liu@mediatek.com> 13 - $ref: /schemas/spi/spi-controller.yaml# 18 - items: 19 - enum: 20 - mediatek,mt7629-spi [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt8173.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/mt8173-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/memory/mt8173-larb-port.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/power/mt8173-power.h> 13 #include <dt-bindings/reset/mt8173-resets.h> 14 #include <dt-bindings/gce/mt8173-gce.h> 15 #include <dt-bindings/thermal/thermal.h> [all …]
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H A D | mt8173-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include "mt8173.dtsi" 12 model = "MediaTek MT8173 evaluation board"; 13 chassis-type = "embedded"; 14 compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; 31 compatible = "hdmi-connector"; 37 remote-endpoint = <&hdmi0_out>; 43 compatible = "linux,extcon-usb-gpio"; [all …]
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H A D | mt6795.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-binding [all...] |
H A D | mt8173-elm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/regulator/dlg,da9211-regulator.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include "mt8173.dtsi" 25 compatible = "pwm-backlight"; 27 power-supply = <&bl_fixed_reg>; 28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>; 30 pinctrl-names = "default"; [all …]
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H A D | mt8516.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt8516-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/phy/phy.h> 13 #include "mt8516-pinfunc.h" 17 interrupt-parent = <&sysirq>; 18 #address-cells = <2>; 19 #size-cells = <2>; 21 cluster0_opp: opp-table-0 { [all …]
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H A D | mt7622.dtsi | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mt7622-clk.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt7622-power.h> 14 #include <dt-bindings/reset/mt7622-reset.h> 15 #include <dt-bindings/thermal/thermal.h> 19 interrupt-parent = <&sysirq>; 20 #address-cells = <2>; [all …]
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H A D | mt8183.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt8183-clk.h> 9 #include <dt-bindings/gce/mt8183-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8183-larb-port.h> 13 #include <dt-bindings/power/mt8183-power.h> 14 #include <dt-bindings/reset/mt8183-resets.h> 15 #include <dt-bindings/phy/phy.h> 16 #include <dt-bindings/thermal/thermal.h> [all …]
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H A D | mt8186.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com> 6 /dts-v1/; 7 #include <dt-bindings/clock/mt8186-clk.h> 8 #include <dt-bindings/gce/mt8186-gce.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/memory/mt8186-memory-port.h> 12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h> 13 #include <dt-bindings/power/mt8186-power.h> [all …]
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H A D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8195-clk.h> 9 #include <dt-bindings/gce/mt8195-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8195-memory-port.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 15 #include <dt-bindings/power/mt8195-power.h> [all …]
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H A D | mt8188.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 /dts-v1/; 8 #include <dt-bindings/clock/mediatek,mt8188-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/mailbox/mediatek,mt8188-gce.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> 14 #include <dt-bindings/power/mediatek,mt8188-power.h> 15 #include <dt-bindings/reset/mt8188-resets.h> [all …]
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H A D | mt8192.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8192-clk.h> 9 #include <dt-bindings/gce/mt8192-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8192-larb-port.h> 13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h> 14 #include <dt-bindings/phy/phy.h> 15 #include <dt-bindings/power/mt8192-power.h> [all …]
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/freebsd/sys/contrib/device-tree/Bindings/soc/mediatek/ |
H A D | pwrap.txt | 5 On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface 8 optionally be encrypted. Also a non standard Dual IO SPI mode can be 14 The signals of these pins are routed over the SPI bus using the pwrap 20 - compatible: 21 "mediatek,mt2701-pwrap" for MT2701/7623 SoCs 22 "mediatek,mt6765-pwrap" for MT6765 SoCs 23 "mediatek,mt6779-pwrap" for MT6779 SoCs 24 "mediatek,mt6797-pwrap" for MT6797 SoCs 25 "mediatek,mt6873-pwrap" for MT6873/8192 SoCs 26 "mediatek,mt7622-pwrap" for MT7622 SoCs [all …]
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H A D | mediatek,pwrap.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
H A D | mediatek,sysirq.txt | 3 MediaTek SOCs sysirq support controllable irq inverter for each GIC SPI 7 - compatible: should be 8 "mediatek,mt8516-sysirq", "mediatek,mt6577-sysirq": for MT8516 9 "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 10 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 11 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 12 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 13 "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622 14 "mediatek,mt7623-sysirq", "mediatek,mt6577-sysirq": for MT7623 15 "mediatek,mt7629-sysirq", "mediatek,mt6577-sysirq": for MT7629 [all …]
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H A D | mediatek,mt6577-sysirq.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/mediatek,mt6577-sysirq.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 MediaTek SOCs sysirq support controllable irq inverter for each GIC SPI 14 - Matthias Brugger <matthias.bgg@gmail.com> 19 - const: mediatek,mt6577-sysirq 20 - items: 21 - enum: 22 - mediatek,mt2701-sysirq [all …]
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/freebsd/sys/contrib/device-tree/src/mips/ralink/ |
H A D | mt7621.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 #include <dt-bindings/interrupt-controller/mips-gic.h> 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/clock/mt7621-clk.h> 5 #include <dt-bindings/reset/mt7621-reset.h> 8 compatible = "mediatek,mt7621-soc"; 10 #address-cells = <1>; 11 #size-cells = <1>; 14 #address-cells = <1>; 15 #size-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/mediatek/ |
H A D | mt7623.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2017-2018 MediaTek Inc. 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/clock/mt2701-clk.h> 13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h> 14 #include <dt-bindings/power/mt2701-power.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/phy/phy.h> 17 #include <dt-bindings/reset/mt2701-resets.h> [all …]
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H A D | mt7629.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/mt7629-clk.h> 11 #include <dt-bindings/power/mt7622-power.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/reset/mt7629-resets.h> 18 interrupt-parent = <&sysirq>; 19 #address-cells = <1>; [all …]
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H A D | mt2701.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt2701-clk.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/power/mt2701-power.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/memory/mt2701-larb-port.h> 14 #include <dt-bindings/reset/mt2701-resets.h> 15 #include "mt2701-pinfunc.h" 18 #address-cells = <2>; [all …]
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