Searched +full:mt8173 +full:- +full:hdmi (Results 1 – 14 of 14) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/display/mediatek/ |
| H A D | mediatek,hdmi.txt | 1 Mediatek HDMI Encoder 4 The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from 8 - compatible: Should be "mediatek,<chip>-hdmi". 9 - the supported chips are mt2701, mt7623 and mt8173 10 - reg: Physical base address and length of the controller's registers 11 - interrupts: The interrupt signal from the function block. 12 - clocks: device clocks 13 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details. 14 - clock-names: must contain "pixel", "pll", "bclk", and "spdif". 15 - phys: phandle link to the HDMI PHY node. [all …]
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| H A D | mediatek,hdmi-ddc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi-ddc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek HDMI DDC 10 - CK Hu <ck.hu@mediatek.com> 11 - Jitao shi <jitao.shi@mediatek.com> 14 The HDMI DDC i2c controller is used to interface with the HDMI DDC pins. 19 - mediatek,mt7623-hdmi-ddc 20 - mediatek,mt8167-hdmi-ddc [all …]
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| H A D | mediatek,hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek HDMI Encoder 10 - CK Hu <ck.hu@mediatek.com> 11 - Jitao shi <jitao.shi@mediatek.com> 14 The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from 20 - mediatek,mt2701-hdmi 21 - mediatek,mt7623-hdmi [all …]
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| H A D | mediatek,split.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 24 - enum: 25 - mediatek,mt8173-disp-split 26 - mediatek,mt8195-mdp3-split 27 - items: 28 - const: mediatek,mt6795-disp-split [all …]
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| H A D | mediatek,cec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek HDMI CEC Controller 10 - CK Hu <ck.hu@mediatek.com> 11 - Jitao shi <jitao.shi@mediatek.com> 14 The HDMI CEC controller handles hotplug detection and CEC communication. 19 - mediatek,mt7623-cec 20 - mediatek,mt8167-cec 21 - mediatek,mt8173-cec [all …]
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| H A D | mediatek,dpi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - CK Hu <ck.hu@mediatek.com> 11 - Jitao shi <jitao.shi@mediatek.com> 15 subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a 21 - enum: 22 - mediatek,mt2701-dpi 23 - mediatek,mt7623-dpi 24 - mediatek,mt8173-dpi [all …]
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| H A D | mediatek,dpi.txt | 5 provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel 9 - compatible: "mediatek,<chip>-dpi" 10 the supported chips are mt2701, mt7623, mt8173 and mt8183. 11 - reg: Physical base address and length of the controller's registers 12 - interrupts: The interrupt signal from the function block. 13 - clocks: device clocks 14 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details. 15 - clock-names: must contain "pixel", "engine", and "pll" 16 - port: Output port node with endpoint definitions as described in 18 to the input port of an attached HDMI or LVDS encoder chip. [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | mediatek,hdmi-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: MediaTek High Definition Multimedia Interface (HDMI) PHY 11 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 12 - Philipp Zabel <p.zabel@pengutronix.de> 13 - Chunfeng Yun <chunfeng.yun@mediatek.com> 16 The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel 17 output and drives the HDMI pads. [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | mt8173-rt5650.txt | 1 MT8173 with RT5650 CODECS and HDMI via I2S 4 - compatible : "mediatek,mt8173-rt5650" 5 - mediatek,audio-codec: the phandles of rt5650 codecs 6 and of the hdmi encoder node 7 - mediatek,platform: the phandle of MT8173 ASoC platform 10 - codec-capture : the subnode of rt5650 codec capture 11 Required codec-capture subnode properties: 12 - sound-dai: audio codec dai name on capture path 13 <&rt5650 0> : Default setting. Connect rt5650 I2S1 for capture. (dai_name = rt5645-aif1) 14 <&rt5650 1> : Connect rt5650 I2S2 for capture. (dai_name = rt5645-aif2) [all …]
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| H A D | mt8173-rt5650-rt5676.txt | 1 MT8173 with RT5650 RT5676 CODECS and HDMI via I2S 4 - compatible : "mediatek,mt8173-rt5650-rt5676" 5 - mediatek,audio-codec: the phandles of rt5650 and rt5676 codecs 6 and of the hdmi encoder node 7 - mediatek,platform: the phandle of MT8173 ASoC platform 12 compatible = "mediatek,mt8173-rt5650-rt5676"; 13 mediatek,audio-codec = <&rt5650 &rt5676 &hdmi0>;
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| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt8173.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/mt8173-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/memory/mt8173-larb-port.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/power/mt8173-power.h> 13 #include <dt-bindings/reset/mt8173-resets.h> 14 #include <dt-bindings/gce/mt8173-gce.h> 15 #include <dt-bindings/thermal/thermal.h> [all …]
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| H A D | mt8173-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include "mt8173.dtsi" 12 model = "MediaTek MT8173 evaluation board"; 13 chassis-type = "embedded"; 14 compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; 31 compatible = "hdmi-connector"; 32 label = "hdmi"; 37 remote-endpoint = <&hdmi0_out>; [all …]
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| H A D | mt8173-elm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/regulator/dlg,da9211-regulator.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include "mt8173.dtsi" 25 compatible = "pwm-backlight"; 27 power-supply = <&bl_fixed_reg>; 28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>; 30 pinctrl-names = "default"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/mediatek/ |
| H A D | mt7623n.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright © 2017-2020 MediaTek Inc. 10 #include <dt-bindings/memory/mt2701-larb-port.h> 19 compatible = "mediatek,mt7623-g3dsys", 20 "mediatek,mt2701-g3dsys", 23 #clock-cell [all...] |